D&R Headline News (Last 14 Days)

Headlines for Thursday Jun. 20, 2019

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Western Digital Extends Openness of PlatformIO and Enhances its RISC-V Portfolio to Accelerate Data-Centric Innovation

Western Digital Corp. (NASDAQ: WDC) today announced a new a strategic partnership with PlatformIO Labs, OÜ, in collaboration with SiFive, Inc., to extend the openness of PlatformIO vendor-agnostic embedded development platform to include new tools, thereby providing an end-to-end, open environment for innovation, including development for RISC-V

• "Video For Machines" Using MPEG's New CDVA Standard, On Gyrfalcon's Industry Leading Chips
• ON Semiconductor Completes Acquisition of Quantenna Communications
• GLOBALFOUNDRIES Adds Industry Veteran Glenda Dorchak to its Board of Directors to Support Next Phase of Transformative Growth
• eSilicon, Samtec and Wild River Technology Offer High-Performance Communications Webinar
• Attopsemi Technology's Notification of Office Relocation

Headlines for Wednesday Jun. 19, 2019

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PCI-SIG Announces Upcoming PCI Express 6.0 Specification to Reach 64 GT/s

PCI-SIG® today announced that PCI Express® (PCIe®) 6.0 technology will double the data rate to 64 GT/s while maintaining backwards compatibility with previous generations and delivering power efficiency and cost-effective performance. The PCIe 6.0 specification is actively targeted for release in 2021.

• Acacia Communications Adopts Cadence Palladium Z1 Enterprise Emulation Platform to Accelerate Optical Networking Development
• Can Huawei Survive?
• CSEM and MIFS demonstrate world-record lows in energy consumption for a microcontroller
• Nurlink Completes First Call on Commercial NB-IoT Network with its CEVA-powered eNB-IoT SoC
• U.S. Companies Dominate Worldwide IC Marketshare

Headlines for Tuesday Jun. 18, 2019

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Astera Labs Verifies Its System-Aware PCI Express 5.0 Smart Retimer Using Avery Design Systems PCIe 5.0 Verification IP

Avery Design Systems, leader in functional verification solutions today announced that Astera Labs successfully utilized Avery's Peripheral Component Interconnect PCI Express® (PCIe®) 5.0 Verification IP and services to verify its breakthrough system-aware PCIe 5.0 Smart Retimer.

• SiFive Enhances Silicon Hills Operations with Office in Austin, Texas
• Achronix Selects Moortec's 7nm Embedded Temperature Sensor to Optimise Performance and Reliability in its 4th Generation Speedster FPGA
• Xilinx Hits Milestone with First Customer Shipments of Versal ACAP
• Arteris IP FlexNoC Interconnect Licensed by Achronix for New Speedster7t FPGA family
• Chiplet Ecosystem Slowly Picks up Steam
• NVIDIA Brings CUDA to Arm, Enabling New Path to Exascale Supercomputing
• Telechips selects PowerVR GPU for Automotive

Headlines for Monday Jun. 17, 2019

• Moortec to Showcase its PVT Monitoring IP at TSMC China Technology Symposium
• Introducing Intel's New Network and Custom Logic Group
• Global Top Ten Foundries for 2Q19 Perform Less-than-expected Due to Sliding Demand and High Inventories, Says TrendForce
• UltraSoC joins GSA IoT Security Working Group
• Can We Believe The Hype About China's Domestic IC Production Plans?

Headlines for Thursday Jun. 13, 2019

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X-FAB and Efabless Announce Successful First Silicon of Raven, An Open-Source RISC-V Microcontroller

X-FAB Silicon Foundries, the leading analog/mixed-signal and specialty foundry, together with crowd-sourcing IC platform partner Efabless Corporation, today announced the successful first-silicon availability of the Efabless RISC-V System on Chip (SoC) reference design.

• Toshiba Selects Cadence Tensilica Vision P6 DSP as Image Recognition Processor for its Next-Generation ADAS Chip
• UltraSoC strengthens management team with appointment of CFO
• Mythic Secures $30M in New Financing and Strengthens Leadership Team

Headlines for Wednesday Jun. 12, 2019

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Intel to Acquire Barefoot Networks, Accelerating Delivery of Ethernet-Based Fabrics

An Emerging Leader in Ethernet Switch Silicon for the Data Center, Barefoot Networks will Help Intel’s Data Center Group Meet the Rapidly-Changing Needs of Hyperscale Cloud Customers

• Everspin Enters Pilot Production Phase for the World's First 28 nm 1 Gb STT-MRAM Component
• Synopsys Achieves ISO 9001 Certification for IP Quality Management System
• Global Fab Equipment Spending to Rebound in 2020 with 20 Percent Growth
• IC Compiler II with Advanced Fusion Technologies Delivers Optimal QoR and Reduces ECO Turnaround Time More Than 40% at Juniper Networks
• Magewell Selects Lattice Semiconductor ECP FPGA Family For Video Capture Devices

Headlines for Tuesday Jun. 11, 2019

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Silicon-Proven Arteris IP Ncore Cache Coherent Interconnect Implemented in Toshiba ISO 26262-Compliant ADAS Chip

Arteris IP today announced that Toshiba has taped out its next generation automotive advanced driver assistance system (ADAS) chip using the Arteris IP Ncore Cache Coherent and FlexNoC®non-coherent interconnect with the associated Resilience Package.

• Cobham Releases New Instruction Simulator for Radiation Hardened Processors
• Logic Design Solutions Introduces the first NVMe Host IP on PolarFire FPGA
• Imperas and Metrics Collaborate to Jump Start RISC-V Core Design Verification Using Open Source Instruction Stream Generator
• Space Codesign Systems Announces Support of Zynq UltraScale+ MPSoC
• Gyrfalcon's 2803 Plai Plug Development Hardware Delivers 24 TOPS/W for AI From Edge to Cloud
• HDL Design House Adds New Representative in Europe
• Marvell Extends Strategic Partnership with Arm
• intoPIX Presents the Smart Path for AV Over IP at InfoComm 2019
• Dream Chip opened new ASIC Design Center in Eindhoven, Netherlands

Headlines for Monday Jun. 10, 2019

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Andes Technology Launches RISC-V FreeStart Program with its Commercial-Grade CPU N22

Andes Technology today announces its RISC-V FreeStart program. The program offers an easy and fast way to build a solid SoC foundation on the commercial-grade RISC-V CPU core N22, available for free download. AndesCore™ N22 is an entry-level, ultra-compact, low-power and performance-efficient RISC-V CPU IP.

• TSMC May 2019 Revenue Report
• CEVA Collaborates with Ellisys to Achieve SIG Qualification for its Bluetooth 5.1 Low Energy IP
• SingMai offer universal encoding and decoding of analogue video
• UMC Reports Sales for May 2019

Headlines for Friday Jun. 07, 2019

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Silex Insight now supports 1GbE, 2.5GbE & 10GbE with their AV over IP OEM boards

Silex Silex Insight, a leading provider of AV over IP solutions, announces the extension of its family of ultra-low latency Audio/Video over IP OEM boards (called Viper), with the support of 2,5Gb and 10Gb Ethernet (in addition to 1GbE).

• GLOBALFOUNDRIES and Soitec Announce Multiple Long-term SOI Wafer Supply Agreements to Meet Accelerating Demand in 5G, IoT and Data Center
• Imperas delivers first RISC-V Simulator for new Vector and Bit Manipulation specifications to Lead Customers
• SiFive Celebrates Historic 100 Design Win Milestone
• SiFive Secures $65.4 Million In Series D Funding

Headlines for Thursday Jun. 06, 2019

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OpenHW Group created and announces CORE-V family of open-source cores for use in high volume production SoCs

A new not-for-profit global organization aims to boost the adoption of open-source processors by providing a platform for collaboration, creating a focal point for ecosystem development, and offering open-source IP for processor cores.

• ARM gets a rival as AMD licenses graphics IP to Samsung
• Efabless Collaborates with GLOBALFOUNDRIES to Enable New IP Development Models for Emerging Applications
• Communications IC Market to Again Surpass Computer IC Market
• Lattice Diamond 3.11 Software Adds Support for New MachXO3D FPGA
• GUC Monthly Sales Report - May 2019

Headlines for Wednesday Jun. 05, 2019

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Inside Secure Releases Industry's First Tool to Quickly, Graphically Create Secure Crypto Architectures

Inside Secure (Euronext Paris: INSD) today announced general availability of Whitebox Designer, its new software security tool that arms vehicle app developers, IoT device developers and OEMs with new levels of protection, reduced time to market, and simplified creation of crypto architectures.

• Faraday Adopts Synopsys SpyGlass Design Handoff Kit to Ensure High Design Quality
• First steps towards a made-in-Europe high-performance microprocessor
• Global Semiconductor Sales Decrease 14.6 Percent Year-to-Year in April; 12 Percent Decrease in Annual Sales Projected for 2019
• SolidRun and Gyrfalcon Team Up to Accelerate On-Device AI Performance with Powerful New i.MX 8M Mini SOM
• Socionext Adopts the Cadence Full-Flow Digital and Signoff Tools for 7nm Designs