D&R Headline News (Last 14 Days)

Headlines for Friday Jun. 11, 2021

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Intel said to have offered $2bn for SiFive

Intel is reported by Reuters to have offered $2billion to buy six year-old RISC-V chip designer SiFive.

• Truechip Announces Customer Shipment of PCIe Gen 6 Verification IP
• Sequans Communications Adopts Cadence RF Solution to Develop Next-Generation 5G IoT Platform
• Lattice and Infineon Technologies Collaborate to Deliver New Pictor Reference Design Kit
• sureCore & Intrinsic Announce Collaboration to Bring Novel RRAM Technology to Market

Headlines for Thursday Jun. 10, 2021

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Silex Insight launches the all-new VIPER (4K60 4:4:4 AV over IP transmitter/receiver board), ideal for collaboration featuring seamless switching between multiple inputs (2xHDMI/1xUSB-C)

Silex Insight, a leading provider of video codec and AV over IP solutions has today announced the next generation of AV over IP 4K60 4:4:4 board, delivering the ultimate combination of inputs, highest quality and features. It comes with an all-new design with 3 inputs for seamless switching between the sources for optimal collaboration.

• TSMC May 2021 Revenue Report
• Xilinx Acquires Silexica to Broaden its Developer Base
• Hardent VESA DSC and FEC IP Cores Licensed by Kinetic Technologies
• Global Semiconductor Sales Increase 1.9% Month-to-Month in April; Annual Sales Projected to Increase 19.7% in 2021, 8.8% in 2022
• Bosch opens wafer fab of the future in Dresden
• Creonic to Offer End-to-end IP-over-Satellite Solutions
• Samsung Successfully Completes 8nm RF Solution Development to Strengthen 5G Communications Chip Solutions
• Xilinx Extends Edge Compute Leadership with World's Highest AI Performance-per-Watt

Headlines for Wednesday Jun. 09, 2021

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AndesBoardFarm Enables SoC Designers to Explore RISC-V Processors in Online FPGA Board Collection

Andes Technology today announced “AndesBoardFarm”, a collection of on-line accessible FPGA boards and management software for SoC designers to experience the AndesCore™ RISC-V processors remotely from their local sites.

• IBM, GlobalFoundries in Breach-of-Contract Spat
• TSMC's Chip Scaling Efforts Reach Crossroads at 2nm
• OPENEDGES and The Six Semi Announce Silicon Proven GDDR6 PHY in 12nm Process Technology
• Automotive IC Marketshare Slips in 2020 After Steady Gains Since 1998
• New Cadence Allegro X Design Platform Revolutionizes System Design

Headlines for Tuesday Jun. 08, 2021

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Xylon Releases a Complete Multi-Channel HDR ISP IP Suite

The logicBRICKS HDR ISP IP Suite enables parallel processing of multiple Ultra HD video inputs in Xilinx programmable devices, ranging from the Artix-7 FPGAs to the latest Versal ACAP devices, while at the same time allowing for tremendous savings of up to 50 % of valuable programmable logic in comparison to simple instantiation of multiple ISP pipelines

• Synopsys Acquires Code Dx to Extend Application Security Portfolio
• Arteris IP FlexNoC Interconnect & Resilience Package Again Licensed by Black Sesame for ISO 26262-Compliant Automotive ADAS Chips
• GLOBALFOUNDRIES and GlobalWafers Partnering to Expand Semiconductor Wafer Supply
• GUC Tapes Out AI/HPC/Networking Platform on TSMC CoWoS Technology Validating 7.2 Gbps HBM3 Controller and PHY, GLink-2.5D and 112G-LR SerDes IPs
• Mythic Expands Product Lineup with New Scalable, Power-Efficient Analog Matrix Processor for Edge AI Applications
• eMemory and PUFsecurity Join DARPA Toolbox Initiative
• Siemens acquires proFPGA product family from PRO DESIGN to expand industry-leading IC verification portfolio

Headlines for Monday Jun. 07, 2021

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NVM Express Announces the Rearchitected NVMe 2.0 Library of Specifications

NVM Express, Inc. today announced the release of the NVM Express® (NVMe®) 2.0 family of specifications. The restructured NVMe 2.0 specifications allow for faster and simpler development of NVMe solutions to support the increasingly diverse NVMe device environment, now including Hard Disk Drives (HDDs).

• GUC Monthly Sales Report - May 2021
• Palma Ceia SemiDesign Announces New Wi-Fi HaLow Chips, PCS2100 and PCS2500 - Ideal for Industry 4.0
• UMC Reports Sales for May 2021

Headlines for Thursday Jun. 03, 2021

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Synopsys Expands Multi-Die Solution Leadership with Industry's Lowest Latency Die-to-Die Controller IP

Synopsys, Inc. today announced its new DesignWare® Die-to-Die Controller IP, which complements the company's existing 112G USR/XSR PHY IP for a complete die-to-die IP solution. With the complete IP solution, designers benefit from a low-latency, high-bandwidth die-to-die connectivity offering that addresses the increased workload and faster data movement demands of high-performance computing, artificial intelligence (AI) and networking SoCs.

• TSMC's Zhang: Automotive is Going HPC
• intoPIX delivers JPEG XS Compressed Solutions for Low Latency Video Streaming with NVIDIA GPUs
• Texas Instruments Continues As World's Top Analog IC Supplier
• Sondrel launches the fourth IP platform - SFA 350A - that delivers faster time to market for ADAS ASICs
• Brite Semiconductor Releases ONFI 4.2 IO and Physical Layer IP based on SMIC 14nm FinFET Process
• SmartDV Announces Support for ARINC Standards with Design and Verification IP
• Siemens enhances Nucleus ReadyStart for Arm platforms with enhanced debug, security and stability features
• EdgeCortix Collaborates with Cadence to Accelerate AI Chip Design

Headlines for Wednesday Jun. 02, 2021

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PLDA and AnalogX Announce Market-leading CXL 2.0 Solution featuring Ultra-low Latency and Power

PLDA and AnalogX today announced an optimized integration of PLDA CXL™ 2.0 controller and AnalogX 32G-MR PHY that reduces latency by 50% and power consumption by 40% compared to leading competitive solutions.

• Arm empowers MCU software developers to capitalize on IoT potential
• NXP Ramps Automotive Processing Innovation with Two Processors on TSMC 16nm FinFET Technology
• PUFsecurity and Andes Technology Cooperate to Integrate Crypto Coprocessor PUFiot into RISC-V AIoT Security Platform
• TSMC Unveils Innovations at 2021 Online Technology Symposium
• Aldec Launches HES-DVM Proto "Cloud Edition" - Giving Engineers Easier Access to FPGA-based ASIC & SoC Prototyping
• First step in its Multi-Codec HEVC and VVC Platform Initiative

Headlines for Tuesday Jun. 01, 2021

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Synopsys DesignWare IP Achieves Broad Industry Adoption with Multiple First-Pass Customer Silicon Successes on TSMC's N5 Process

Synopsys, Inc. today announced that its broad DesignWare® Interface, Logic Library, Embedded Memory and PVT monitor IP solutions have enabled customers to achieve multiple first-pass silicon successes on TSMC's N5 process, across more than 20 leading semiconductor companies.

• Sequans Licenses CEVA 5G Modem IP for Broadband IoT Platform
• EPI EPAC1.0 RISC-V Test Chip Taped-out
• Analog Bits to Demonstrate 5nm IP Silicon at TSMC 2021 Online Technology Symposium
• Siemens announces EDA milestones and tool certifications for TSMC's latest process technologies

Headlines for Monday May. 31, 2021

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Dolphin Design joins Arm Approved Design Partner Program

Dolphin Design, a leading provider of semiconductor IP and design platforms, with full turnkey SoC services, announce that they have been selected to join the Arm® Approved Design Partner program.

• Quarterly Revenue of Top 10 Foundries Breaks Records in 1Q21 Owing to Price Hikes Caused by Tight Foundry Capacities, Says TrendForce
• Arm Upgrades Its Entire PC And Mobile Portfolio
• Join Innosilicon at TSMC 2021 Online Technology Symposium
• SEGGER's emRun Runtime Library Licensed by SiFive for Superior Code Size and Performance Improvements
• Cadence Collaborates with TSMC to Accelerate Mobile, AI and Hyperscale Computing Application Development on N3 and N4 Processes

Headlines for Thursday May. 27, 2021

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Synopsys DesignWare PVT Subsystem Drives Performance, Power and Silicon Lifecycle Management on TSMC's N3 Process Technology

Synopsys, Inc. (Nasdaq: SNPS) today announced the availability of its DesignWare® process, voltage and temperature (PVT) monitoring and sensing subsystem IP on TSMC's industry-leading N3 process technology.

• Mirabilis Design and E-Elements Technology team up to provide concept-to-implementation design flow for AI applications
• Silex Insight launches high performance (2Tbps) SM4-GCM Multi-booster
• DCD-SEMI accelerates AES security with the latest IP Core
• USB Promoter Group Announces USB Power Delivery Specification Revision 3.1
• Siemens launches PCI Express 6.0 Questa Verification IP solution
• Precise-ITC launches 10G-1.6T Ethernet/FiberChannel/FlexO IP Core
• AImotive launches aiWare4, featuring advanced wavefront processing, upgraded safety and low-power features
• Arm battens down the spending hatches
• Cadence Unleashes Clarity 3D Solver on the Cloud for Straightforward, Secure and Scalable Electromagnetic Analysis of Complex Systems on AWS