NVM OTP in UMC (180nm, 153nm, 110nm, 90nm, 80nm, 55nm, 40nm, 28nm, 22nm)
CLICK - The universal solution of power gating for the whole SoC
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Power gating IP
- CLICK - The universal solution of power gating for the whole SoC
- CLICK - The universal solution of power gating for the whole SoC
- CLICK - The universal solution of power gating for the whole SoC
- One Port Register File Compiler IP, Bit-cell: 0.425um2 (HVT), Support retention and deep sleep modes with built-in power gating circuitry., UMC 55nm LP process
- UMC 28nm HPC process Dual Port SRAM with Power gating
- UMC 28nm HPC Process dual port SRAM with power gating