NVM OTP in UMC (180nm, 153nm, 110nm, 90nm, 80nm, 55nm, 40nm, 28nm, 22nm)
Quad SPI Master IP
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Block Diagram of the Quad SPI Master IP IP Core
Quad SPI IP
- Quad SPI Controller
- AHB Quad SPI Controller with Execute in Place
- SPI FLASH Controller with Execute in place – XIP (SINGLE, DUAL and QUAD SPI Bus Controller with DDR / DTR support and optional AES Encryption)
- Serial Peripheral Interface - Master/Slave with single, dual, quad and octal SPI Bus support
- Serial Peripheral Interface – Master/Slave with Octal, Quad, Dual and Single SPI Bus support
- Serial Peripheral Interface - Master/Slave with single, dual and quad SPI Bus support