32-bit RISC-V embedded processor with TUV SUD ISO 26262 ASIL B certification
SelectIO Interface Wizard
Xilinx provides an easy to use wizard to configure the SelectIO blocks in Xilinx FPGAs.
The LogiCORE™ IP SelectIO™ Interface Wizard provides an intuitive customization GUI that helps users configure SelectIO blocks on Xilinx FPGAs to support their design requirements. The wizard generates an HDL wrapper that configures the SelectIO blocks such as IOSERDES and IODELAY and connects them to IO clock primitives in your design. Includes built-in templates to automate configuring of SelectIO to support various standard interfaces (SGMII, DVI, Camera Link, Chip to Chip) and a range of I/O signaling standards (LVCMOSxx, HSTLxx, SSTLxx).
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Interface and Interconnect IP
- AXI- Interconnect : Advanced Extensible Interface Bus IP
- Serial Peripheral Interconnect Master & Slave Interface Controller
- Physical Layer Interface Core
- PCIe 2.1 Controller supporting Root Port, Endpoint, Dual-mode Configurations, with Built-in DMA and Configurable AMBA AXI Interconnect
- PCIe 1.1 Controller supporting Root Port, Endpoint, Dual-mode Configurations, with Built-in DMA and Configurable AMBA AXI Interconnect
- Local Interconnect Network (LIN) Soft Controller IP