Faststream Technologies HDMI Verification IP provides an effective & efficient way to verify the components interfacing with HDMI interface of an ASIC/FPGA or SoC.
Our HDMI VIP is fully compliant with HDMI 2.0 Specification. This VIP is a light weight VIP with easy plug-and-play interface so that there is no hit on the design time and the simulation time.
- Fully compliant to HDMI 2.0 Specification.
- Supports three TDMS data channel and one clock channel.
- Supports display data channel(DDC).
- Supports following operating modes ‐
- Video period
- Data Island
- Control period
- Supports all types of video formats, color depth and pixel formats.
- Supports all type of encoding and packet formats.
- Supports TERC4 coding.
- Supports scrambling and descrambling
- Supports Scrambled control period
- Supports Unscrambled control period
- Supports YCbCr 4:2:0 Pixel encoding
- Supports all new packets 3D Audio Sample Packet, One bit 3D
- Audio Sample Packet, Audio Metadata Packet
- Multi Stream Audio Sample Packet. One bit Multi Stream Audio
- Sample Packet
- Receiver and monitor are able to handle and report following types
- of error
- Invalid Control character, Sync error, Ecc errors, encoding error,
- Invalid Data character.
- Supports dynamically configurable modes.
- Strong Protocol Monitor with real time exhaustive programmable
- Supports Dynamic as well as Static Error Injection scenarios.
- On the fly protocol checking using protocol check functions, static
- and dynamic assertion.
- Built in Coverage analysis.
- Provides a comprehensive user API (callbacks) in Transmitter and
- Graphical analyser to show transactions for easy debugging.
- Available in native SystemVerilog (UVM/OVM/VMM) and Verilog
- Unique development methodology to ensure the highest levels of quality
- Availability of various Regression Test Suites
- 24X5 customer support
- Unique and customizable licensing models
- Exhaustive set of assertions and cover points with connectivity example for all the components
- Consistency of interface, installation, operation and documentation across all our VIPs
- Provide complete solution and easy integration in IP and SoC environment
- HDMI Transmitter
- HDMI Receiver
- HDMI Monitor and Scoreboard
- Test‐Bench Configurations
- Test Suite (Available in Source code) :
- Basic Protocol Tests
- Directed & Random Tests
- Assertion and Cover Point Tests
- Integration Guide, User Manual and Release Notes
Block Diagram of the HDMI 2.0 Verification IP Verification IP