Low jitter, ultra-low power (<950uW) ring-oscillator-based PLL-2.4GHz
PCIe Gen6 VIP
solution featuring an advanced UVM environment that
incorporates constrained random traffic generation, robust
TL/DLL/PHY layer controls and error injection, protocol
checks and coverage, functional coverage, protocol analyzerlike
features for debugging, and performance analysis metrics.
With the advanced capabilities of Avery VIP, engineers can
work more efficiently, develop more complex tests, and work
on more complex topologies, such as bifurcation. Avery
compliance testsuites offer effective core-through-chip-level
tests, including those used in compliance workshops as well
as extended tests developed by Avery to cover the
specification features.
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