Industry Expert Blogs

When it comes to digital design implementation, each step in the RTL-to-GDSII process is highly compute intense. At the SoC level, you’re evaluating various floorplan options of hundreds of partitions to minimize latency in the interconnections and drive greater efficiencies. Once you’ve determined your floorplan, then it’s time to move on to the rest of the steps within every partition toward full-chip implementation and signoff. Since compute requirements are already high at each step, and further multiplied by the number of partitions, this begs the questions: Are the CPUs traditionally used in digital design running out of capacity? Would GPUs be able to fulfill the compute demand?

Today, GPUs are noted for handling the most demanding workloads of applications like artificial intelligence (AI)/machine learning (ML), gaming, and high-performance computing. As chips grow larger and more complex, it may also be time to add digital chip design implementation to this list.

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