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With its high-end field programmable gate array- (FPGA-) based data acceleration solutions, Santa Clara, California-based Achronix Semiconductor Corporation is ready to help design teams take on compute-intensive workloads in application areas such as artificial intelligence (AI), machine learning (ML), automotive driver assistance, communications, compute acceleration, industrial, and military. Founded in 2004, the privately held fabless company is the only supplier with both high-performance, high-density standalone FPGAs and licensed eFPGA IP solutions. Ready-to-use PCIe accelerator cars further enhance the company’s offerings. All its products are supported by best-in-class electronic design automation (EDA) tools.

Faced with aging compute resources, infrastructure scalability limitations, and resource constraints, Achronix recognized a need to change its chip design environment. Otherwise, these challenges could create longer design cycles, extended time to results, and unpredictability. The company adopted Synopsys Cloud, with its cloud-native EDA tools and pre-optimized hardware platforms, for all its SoCs, reducing full-chip SoC physical verification from 80 hours with on-premises resources down to 16 hours for one of its chips.

“Synopsys Cloud offers a complete design environment to design SoCs,” said Chris Pelosi, vice president of Hardware Engineering at Achronix. “Highly elastic EDA and compute resources provide excellent flexibility and remove barriers for on-time delivery of designs. Synopsys Cloud has helped us reimagine how we plan and execute SoC design projects on cloud. With the ability to deliver complete designs at a much quicker pace, we can optimize future roadmap schedules for improved verification and higher quality designs ahead of schedule.”

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