This IP is composed of two matched fully differential, high-performance, ultra lowpower
and compact pipeline analog-to-digital converter (ADC), designed in CMOS
55-nm LL technology.
To increase flexibility and optimize the system’s power consumption, the ADCs can
be configured to have a resolution of 8 or 10-bit.
Dedicated S/H circuits are built-in to adjust the input range and provide direct DC
coupling of differential input signals.
The references voltages are generated from a bandgap reference that is also
included in the macro-cell.
A power down capability is included for extremely low power dissipation, and a
standby mode allows fast startup to normal operation. The bandgap generator
has a separate power-down control, which allows to use it even when the ADCs
- IQ Matched ADC Pair
- Resolution Selectable between 8 and 10-bit
- 80 MSPS Conversion Rate
- 2.0/1.6/1.0/0.8 Vpp Differential Input Voltage
- High Performance
- 1.2 V ± 10% Analog Power Supply
- Low Power Dissipation
- Internal Reference Voltage Generator
- Compact Are