AVSBUS Master interface provides full support for the two-wire/ three-wire AVSBUS Master synchronous serial interface, compatible with version 1.3.1 Part III of PMBus Bus Specification. Through its AVSBUS Master compatibility, it provides a simple interface to a wide range of low-cost devices. AVSBUS Master IIP is proven in FPGA environment. The host interface of the AVSBUS Master can be simple interface or can be AMBA APB, AMBA AHB, AMBA AXI, VCI, OCP, Avalon, PLB, Tilelink, Wishbone or Custom protocol.