The Epiphany multicore architecture IP is an integrated microprocessor solution, featuring up to 4,096 processors on a single chip, connected through a high-bandwidth on-chip network. Each processor node represents a fully-featured floating point RISC processor built from scratch for multicore processing, a high bandwidth local memory system, and an extensive set of built in hardware features for multicore communication.
- Out-of-the box floating point C/C++ program execution enables significantly faster time to market and lower development costs
- 10-100X advantage in energy efficiency compared to traditional multicore floating point processors
- Up to 5 TFLOP sustained effective performance on a single chip, enables a new set of high performance applications
- Low latency zero-overhead inter-core communication simplifies parallel programming
- Scalable architecture allows code reuse across a wide range of markets and applications
- Soft IP licensing model supported
- Silicon proven hard macro IP available for licensing in 65nm process