SGMII PHY
This document describes the operation and performance of the PHY and describes how to program the PHY to support different standards and testing modes using Innosilicon’s PHY Programming Utility. The PHY module includes a top-level wrapper integrating both the Physical Media Attachment (PMA) layer, and the Physical Coding Sub-Block (PCS) layer.
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SGMII IP
- 250Mbps to 8.1Gbps Multi-protocol SerDes PMA, wire-bond
- 32G Multi Rate SerDes PHY - GlobalFoundries 22FDX
- 32G Multi Rate Long Reach SerDes PHY - GlobalFoundries 12LP and 12LPP
- 32G Multi Rate Very Short Reach SerDes PHY - GlobalFoundries 12LP and 12LPP
- 25GE/10GE/SGMII/1000BASE-X and MAC
- QSGMII/SGMII/1000BASE-X and MAC