SonicsLX on-chip communications network contains a high performance advanced fabric with data flow services for the development of complex SoCs. SonicsLX utilizes state-of-the-art physical structure design and advanced protocol management to deliver guaranteed high bandwidth together with fine grained power management. Using a crossbar structure, SonicsLX supports multi-threaded and non-blocking communications. Compliance with Open Core Protocol (OCP), AHB, and AXI interfaces ensures maximum reuse of all cores regardless of their native configuration.
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- Optimized interconnect provides advanced features with low gate count reducing overall system costs
- Low power for maximum battery life
- Seamless connection to OCP, AHB, and AXI based cores
- Full user control of latency, performance, and area
- Advanced power management support including clock gating
- Socket based design enables parallel design of SoC cores and interconnect while guaranteeing high SoC core reuse for future product derivatives
- Flexible subsystem-based partitioning
Block Diagram of the SonicsLX on-chip communications network contains a high performance advanced fabric with data flow services for the development of complex SoCs.