Functionality
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Dual-channel, 2-4 bits of resolution SAR ADC. Differential analog inputs.
The bit resolution,and therefore the parallel sample rate, will be dynamically configurable in powers of two. Minimum 2 bits and maximum of 8 bits.
The serial output data is raw, unformatted ADC conversion data for both channels. The samples are delivered continuously in real time per channel channel at serial link rates of 10 Gbps minimum with an eventual path toward 40 Gbps rates.
For 2-bit resolution the sample rate would be 5 GS/s and 1.25 GS/s when configured at 8-bits of resolution.
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External compatibility and integration requirements
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The serial output of the ADC shall be CML outputs that permit interfacing to typical fiber optic and FPGA transceivers.
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Timing or Performance requirements
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Dual Channel ADC with per channel specs as:
5 GS/s sample rate in 2-bit ADC resolution
2.5 GS/s sample rate in 4-bit ADC resolution
1.25 GS/s sample rate in 8-bit ADC resolution
10 Gbps unformatted, raw data serial link with pathway towards 40 Gbps per channel
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Technology Requirements
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Most cost effective process to meet ADC specs
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Availability Timing
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6-12 months
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Business Scheme Requirement
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design services
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