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Monday, March 24, 2025

• Delivering sustainable electronics manufacturing

Sunday, March 23, 2025

• SoCs Get a Helping Hand from AI Platform FlexGen
• Brite Semiconductor Releases DDR3/4, LPDDR3/4 Combo IP
• Accellera Announces IEEE Standard 1801?-2024 is Available Through IEEE GET Program
• 'World-Leading' Semiconductor Design Centre Will 'Strengthen Wales' Leadership in Chip Design'
• M31 Technology - AI-Powered Automotive Dual Engines and 2nm Technology Boost Revenue to Record Highs
• EnSilica Agrees a Multimillion Pound Design and Manufacturing Services Contract
• Strategies for Addressing More Complex Custom Chip Design
• Accellera Announces IEEE Standard 1801â„¢-2024 is Available Through IEEE GET Program

Thursday, March 20, 2025

• Hong Kong investment arm backs Chinese RISC-V start-up StarFive in tech push
• Silvaco Announces Departure of Chief Financial Officer

Wednesday, March 19, 2025

• Menta Unveils 'Launch Pad' Low-Cost Embedded FPGA (eFPGA) Technology Access Program For Defense And Aerospace Customers
• Omni Design Technologies Delivers Multi-Gigahertz SWIFT™ Data Converter Solutions for Satellite Communications
• SoftBank Group to Acquire Ampere Computing
• Global Top 10 IC Design Houses See 49% YoY Growth in 2024, NVIDIA Commands Half the Market, Says TrendForce
• Zero ASIC launches world's first open standard eFPGA product
• Omni Design Technologies Delivers Multi-Gigahertz SWIFTâ„¢ Data Converter Solutions for Satellite Communications
• Dnotitia and HyperAccel Partner to Develop RAG-Optimized AI Inference System
• Synopsys: Autonomous AI Agents to Tame Chip Design Complexity
• Siemens Xcelerator: Siemens accelerates IT and OT integration with Microsoft for Edge, Cloud, AI and Simulation
• Vayavya Labs At The ADAS Show 2025
• QuickLogic Announces the Amendment and Extension of Credit Facility
• Embedded World, Nuremberg: Nordic Semiconductor's Strategy for Secure and Efficient IoT Connectivity

Tuesday, March 18, 2025

• Sofics and Dolphin Semiconductor Announce Strategic Partnership
• KiviCore and CAST Release Post-Quantum Cryptographic Key Encapsulation IP Core
• Comcores is now a member of the OPEN Alliance
• Cycuity Collaborates with SiFive and BAE Systems to Demonstrate Advanced Microelectronics Design Supply Chain Security
• FAMES Pilot Line Launches Open-Access Call for Chip Industry
• Soitec contributes to accelerated development of integrated optical connectivity solutions for AI datacentres with its silicon photonics SOI technology
• Accellera Announces IEEE Standard 1801™-2024 is Available Through IEEE GET Program

Monday, March 17, 2025

• Arteris Selected by Nextchip to Accelerate Chip Designs for Automotive Vision Technology
• Synopsys Accelerates Chip Design with NVIDIA Grace Blackwell and AI to Speed Electronic Design Automation
• Cadence Accelerates AI-Driven Engineering Design and Science with NVIDIA Grace Blackwell
• GlobalFoundries' expansion starts despite CHIPS Act questions
• Speeding AI and HPC Workloads with Composable Memory and Hardware Compression / Decompression Acceleration
• Canada Funds Quantum Auto Security Research
• PQShield Ltd - PQShield Podcast
• Quantum computing shows strong growth into the datacenter
• Cadence Recognized as One of Fast Company's Most Innovative Companies of 2025

Monday, March 17, 2025

• The Transformative Growth Potential of the Semiconductor Industry
• Samsung Rumored to Mull on Scrapping 1.4nm Node to Prioritize 2nm/3nm Yield Gains

Sunday, March 16, 2025

• The Case for Hardware-Assisted Verification in Complex SoCs
• China Bets on Homegrown Chip Tech With RISC-V Push
• SerDes Hard Macro IP in GlobalFoundries 22FDX - Available For Licensing and Implementation from Global IP Core
• Automotive Ethernet PHY IP Core in 28nm with BroadR-Reach and 100BaseT1 Compatibility for Automotive Applications
• Andes Technology Achieves Record Annual Revenue Amid Strong AI Demand
• TSMC and MediaTek Demonstrate First Integrated PMU and PA for Wireless Connectivity Products on N6RF+ Process Technology
• Cadence Joins Intel Foundry Accelerator Design Services Alliance

Thursday, March 13, 2025

• InPsytech Joins Intel Foundry Accelerator IP Alliance to Boost HPC, AI, And Automotive Applications

Thursday, March 13, 2025

• Open-source chip design spurring on AI
• Japan's Rapidus Preps 2nm Foundry Process And Chiplets

Wednesday, March 12, 2025

• GUC Announces Successful Launch of Industry's First 32G UCIe Silicon on TSMC 3nm and CoWoS Technology
• Intel's New CEO Called "Strong Choice" to Respin Company
• Phonemic Officially Registered as Semiconductor Design Center with Polish Space Agency, Strengthening Position in Space Technology
• Renesas targets high volume vision AI with DRP AI core
• Perforce Releases 2025 Automotive Software Report: AI Adoption, Safety Priorities, and Code Complexity Challenges

Tuesday, March 11, 2025

• BOS Semiconductors Signed Development Contract for ADAS Chiplet SoC with an European OEM
• CAST and Shikino High-Tech Partner to Expand Silicon IP Offerings and Market Reach
• Axelera AI and Kudelski IoT Partner for Next-Generation Edge Intelligent Ecosystem
• Allegro DVT Acquires Vicuesoft to Build a Worldwide Leader in Video Codecs Compliance and Analysis Solutions
• Omni Design Technologies Opens Austin Design Center
• TSMC pitched Intel foundry JV to Nvidia, AMD and Broadcom, sources say
• Fifth quantum-secure encryption algorithm selected
• The Critical Factors of a High-performance Audio Codec. What Chip Designers Need to Know.
• Synopsys SNUG Silicon Valley 2025 to Feature Arm, OpenAI and Microsoft Executive Talks