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IP / SOC Products News

• Renesas Technology Develops 1GHz Synthesizable DSP Core that Uses a Technique for High-Speed Operation (Thursday Jun. 22, 2006)
  Renesas Technology Corp. today announced the development of a high-speed, low-power-consumption synthesizable DSP (Digital Signal Processor) core*1 for SoC devices
  
  
• Faraday High-Speed USB OTG PHY and Controller Solution Passes USB-IF Compliance Test (Thursday Jun. 22, 2006)
  Faraday Technology Corporation (TAIEX: 3035), a leading ASIC and IP provider, today announced its USB2.0 High-Speed i 480Mbit/sec j OTG Physical-Layer (PHY) IP and Controller IP have successfully passed the compliance tests in the USB Implementers Forum
  
  
• Cosmic Circuits introduces industry's lowest power 10-bit 1MSPS ADC IP-block in 0.13um process (Wednesday Jun. 21, 2006)
  Cosmic Circuits today announces the availability of the CC101SAR, a 10-bit 1MSPS, 1.35mW, low-power ADC IP-block in 0.13um process. The ADC has been specifically designed for extending battery life in mobile and battery powered applications
  
  
• Lattice Delivers Comprehensive IP Portfolio for LatticeSC Extreme Performance FPGAs (Monday Jun. 19, 2006)
  Lattice Semiconductor Corporation (NASDAQ: LSCC) today announced the immediate availability of an extensive intellectual property (IP) portfolio for the LatticeSC™ Extreme Performance™ FPGA family.
  
  
• Denali Announces Silicon-Proven PCI Express Design IP Product (Monday Jun. 19, 2006)
  Denali today reported the success of its PCI Express (PCIe) design core in production silicon, and announced availability of its latest intellectual property (IP) product, a fully featured design core for PCIe technology.
  
  
• Global Unichip Presents the Taiwan First Certified High-Speed USB2.0 OTG Solution, UINF-0041 (Monday Jun. 19, 2006)
  GUC (Global Unichip Corp.), a leading SoC design foundry, today announced that the High-Speed USB2.0 OTG (USB On-the-Go) Solution, UINF-0041, had been certified and logo proven by USB-IF (USB Implementers Forum)
  
  
• Renesas Technology Develops Technique that Overcomes Effects of Threshold Variation to Stabilize the Operation of Embedded SRAM built with 65nm Process (Thursday Jun. 15, 2006)
  The new technique uses a straight-pattern-shape layout and read-assist and write-assist circuits to overcome SRAM instability due to the variations in transistor characteristics that are inherent in fine-feature process technology
  
  
• IP Cores, Inc. Announces Two New Multi-Gigabit IP Combo AES/LRW and AES/GCM Cores for System on Chip (SoC) Design (Monday Jun. 12, 2006)
  IP Cores, Inc., setting the benchmark for security IP cores, today announced two silicon IP cores supporting new industry standards. New GLM1 and GLM2 IP cores enable System on Chip (SoC) vendors to build compact processors that support the AES/LRW and AE
  
  
• Synopsys' New Designware Bridge IP for PCI Express to AMBA 3 AXI Connects Two High-Performance Domains (Wednesday Jun. 07, 2006)
  Synopsys, Inc. (Nasdaq:SNPS), a world leader in semiconductor design software, today announced the availability of the DesignWare® Bridge Intellectual Property (IP) for PCI Express® to AMBA® 3 AXI™ protocol.
  
  
• Hantro announces next generation 4200 MPEG-4 / H.263 software encoder for ARM based wireless devices (Tuesday Jun. 06, 2006)
  Hantro announced today the release of its next generation 4200 MPEG-4 / H.263 software encoder for ARM based wireless devices. Significantly improving image quality, the encoder is particularly suited for fast movement making it ideal for implementing cam
  
  
• LogicVision Announces New Generation of Embedded Memory Test and Yield Learning Solutions to Meet the Growing Challenges of Advanced Technology Nodes (Monday Jun. 05, 2006)
  LogicVision, Inc. , today announced the availability of ETMemory, its newest generation of embedded memory test and yield capabilities specifically targeted at chips designed at advanced technology nodes
  
  
• Altera and MorethanIP Deliver First IEEE 1588 Protocol Solution for FPGAs (Monday Jun. 05, 2006)
  Altera Corporation (NASDAQ: ALTR) and Germany-based design and intellectual property (IP) provider MorethanIPtoday announced the availability of the industry’s first triple-speed Ethernet medium access control (MAC) IP core supporting the IEEE 1588 standa
  
  
• Lattice and Northwest Logic Deliver PCI Express X1, X4 and X8 Solutions (Monday Jun. 05, 2006)
  Lattice Semiconductor (NASDAQ: LSCC) today announced that Intellectual Property (IP) provider Northwest Logic has ported its PCI Express product line, consisting of x1, x4 and x8 IP cores, to LatticeSC™ (System Chip) FPGA devices
  
  
• Chipidea Offers Controller Core To Complete Full Line Of USB Offerings (Wednesday May. 31, 2006)
  Chipidea today announced the immediate availability of its new USB controller core, a digital IP block designed to complement the company's extensive portfolio of mixed signal USB physical layer transceiver (PHY) IP. The controller core eases integration
  
  
• Altera, IFI, SMSC Partnership Provides FPGA-Based, MOST Interface (Tuesday May. 30, 2006)
  Altera Corporation, today announced the availability of the MediaLB intellectual property (IP) core developed in partnership with IFI and SMSC. The IP core eases implementation of the popular Media Oriented Systems Transport (MOST) bus protocol for automo
  
  
• eInfochips Launches Comprehensive Suite of ARM technology-based IP and Services and Joins ARM Connected Community Program (Monday May. 22, 2006)
  eInfochips Inc., a leading silicon and product design services firm with spec-to-silicon-to-system capabilities, today announced the availability of the company’s suite of ARM processor-based IP and services
  
  
• Altera Delivers PCI-SIG-Compliant x8 PCI Express Solution Supporting Stratix II GX FPGA (Monday May. 22, 2006)
  Altera Corporationtoday announced that its Stratix® II GX FPGA, PCI Express x8 MegaCore® intellectual property (IP) core and Stratix II GX-based PCI Express Development Kit passed the PCI-SIG Compliance tests
  
  
• LSI Logic 8 Gb/s SerDes Core to Enable Next Generation SANs (Wednesday May. 17, 2006)
  
  
  
• Actel Expands IP Portfolio for Military, Aerospace and Communications Applications (Wednesday May. 17, 2006)
  Actel Corporation (Nasdaq: ACTL) today announced the availability of two new intellectual property (IP) cores optimized for use with Actel's radiation-tolerant and firm-error immune field-programmable gate arrays (FPGAs)
  
  
• Silicon Hive announces new image signal processor (Tuesday May. 16, 2006)
  Silicon Hive announces immediate availability of its HiveFlex Moustique-IC2 processor core to enable highest quality images on camera phones.
  
  
• Sonics Offers Low-Cost SMART Interconnects(TM) Solution; New Version of S3220(TM) Adds OCP 2.0 Support (Tuesday May. 16, 2006)
  Sonics Inc.®, the premier supplier of system-on-chip (SoC) SMART Interconnects(TM) solutions, today announces a new version of its S3220 SMART Interconnects solution featuring support for version 2.0 of the Open Core Protocol (OCP) standard
  
  
• CEVA Expands CEVA-X DSP Family with New Core and System Platform (Tuesday May. 16, 2006)
  CEVA, Inc. (NASDAQ: CEVA; LSE: CVA), the leading licensor of digital signal processor (DSP) cores, multimedia, GPS and storage platforms to the semiconductor industry, today introduced the CEVA-X1622™ DSP core and the CEVA-XS1102™ system platform – the la
  
  
• Silicon & Software Systems (S3) Introduces 90nm IP Portfolio for Consumer and Enterprise Networking Applications (Monday May. 15, 2006)
  Silicon & Software Systems Ltd (S3), a leading supplier of licensable mixed-signal intellectual property building blocks, today announced the availability of silicon-proven data converter IP for designs in the 90nm process technology node
  
  
• CAST Energizes Small, Fast Systems with New Low-Power, 32-Bit Processor Cores (Monday May. 15, 2006)
  Semiconductor intellectual property (IP) provider CAST, Inc. today announced the immediate availability of a new line of 32-bit microprocessor cores for the embedded systems market.
  
  
• ARM Launches Next-Generation Processor (Monday May. 15, 2006)
  ARM today announced at the Spring Processor Forum, in San Jose, California, the new Cortex™-R4 processor for the next generation of mobile phones, hard-disk drives, printers and automotive designs, targeting more than one billion units in the embedded ma
  
  
• Digital Core Design today announces the release of a Double Precision Floating Point Coprocessor (Wednesday May. 10, 2006)
  The DFPMU-DP is a 64-bit Double Precision Floating Point Coprocessor, designed to assist CPU in performing the IEEE754 single and double precision floating point mathematic computations. The DFPMU-DP directly replaces C software functions, by equivalent ,
  
  
• MathStar, Inc. Announces Machine Vision Library for the Field Programmable Object Array (FPOA) (Tuesday May. 09, 2006)
  MathStar, Inc. (Nasdaq:MATH) today announces the introduction of its Machine Vision Library for the Field Programmable Object Array (FPOA). The first two intellectual property cores in the Library are a Color Space Conversion core and a Flat Field Error C
  
  
• Multigig Announces RotaryWave Clock Technology (Monday May. 08, 2006)
  Multigig, Inc. – developers of unique new clock technology for the high-performance silicon market – today announced the company’s revolutionary new RotaryWave™ on-chip clock technology, the first major advance in semiconductor clock design in the last se
  
  
• DWA Wireless Announces Availability of 1 Mbps 868/915 MHz Solution (Thursday May. 04, 2006)
  DWA Wireless has today announced the first available design solution that provides up to 1 Mbps in both Sub 1 GHz bands, 868 and 915 MHz, based on Parallel Sequence Spread Spectrum PHY wireless technology
  
  
• Altera and Genesys Logic Deliver PCI-SIG-Compliant x4 PCI Express Solution (Thursday May. 04, 2006)
  Altera and Genesys Logic today announced the availability of their x4 PCI-SIG-compliant solution using Altera’s Stratix® II FPGAs and PCI Express x4 MegaCore® intellectual property (IP) core and Genesys Logic’s GL9714 PCI Express x4 physical layer (PHY) c