D&R Videos

Codasip video blog series 1, part 2: What is Processor ... from Codasip Sep 08, 2020 8:28	Codasip video blog series 1, part 1: Expanding RISC-V ... from Codasip Sep 08, 2020 6:33	The Path to 200Gbps Serial Links from Alphawave IP, Inc. Sep 03, 2020 29:49
Thalia DA IP Reuse & Technology Analysis from Thalia Design Automation Jul 16, 2020 18:51	Using a patent portfolio to support a global semiconductor ... from SoundHound Inc. May 13, 2020 20:21	The Next Generation RISC-V Processors AndesCore™ ... from Andes Technology Corp. May 11, 2020 26:45
Mixed-Signal IP that accelerates your design from Dialog Semiconductor (S3 Semiconductors) Apr 23, 2020 0:59	Learn how to configure a PCIe IP with an AXI interconnect ... from PLDA Jan 28, 2020 4:44	Status Update of RISC-V P Extension Task Group from Andes Technology Corp. Jan 16, 2020 7:30
Discover how to configure XpressRICH IP from PLDA Nov 25, 2019 5:09	Powering RISC-V SoC With 1 To 1000s Cores from Andes Technology Corp. Nov 07, 2019 27:28	Cadence PCIe 4.0 Receiver JTOL Test from Cadence Oct 17, 2019 1:43
Verification with Emerging Memory Models from Cadence Oct 17, 2019 4:12	What is USB4? USB, PCIe, and DisplayPort with a Single ... from Synopsys Oct 15, 2019 2:12	An Introduction to Palladium Cloud from Cadence Aug 19, 2019 2:04
xSPI Standard Explained from Cadence Aug 06, 2019 3:42	The Storage Combo PHY IP - Nirvana! from Cadence Jul 24, 2019 2:41	What is Happening at the USB IF Standards Meetings? ... from Cadence Jul 17, 2019 4:03

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