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IP / SOC Products News

• Barco Silex extends crypto offering with Chacha20/Poly1305 authenticated encryption (Friday Jun. 16, 2017)
  Barco Silex, leading provider of IP cores for embedded hardware security, adds an RFC7539-compliant crypto engine to its offering to provide its customers with future-proof authenticated encryption between networked applications, for example in the IoT.
  
  
• The new release of SoC-e IEEE 1588 IP Core supports 10 Gigabit Ethernet (Friday Jun. 16, 2017)
  The spectacular increment of IEEE 1588 solution in different sectors is demanding supporting hardware time-stamping in very different media types. SoC-e PreciseTimeBasic IP core (PTB) core is a media-independent hardware time-stamping solution implemented on the FPGA. It does not require 1588-aware Ethernet Phyters and supports SFP modules (fiber, copper, etc.).
  
  
• Noesis Technologies releases its XTS mode AES processor IP Core (Thursday Jun. 15, 2017)
  Noesis Technologies has announced today the immediate availability of its ntAES_XTS IP Core, a fully compliant core with AES-XTS algorithm standardized at NIST SP800-38E and IEEE 1619-2007 recommendations targeting disk encryption applications at sector (data unit) addressable level.
  
  
• Andes Technology and M31 Technology Collaborated on Optimal Power Efficiency CPU Implementation for IoT SoC Market (Thursday Jun. 15, 2017)
  Andes Technology and M31 Technology today jointly announced that AndesCoreTM N705 CPU had adopted M31’s low-power silicon IPs and Power Management Kit (PMK) to provide a very low power consumption CPU solution for SoC design in IoT and related low power applications.
  
  
• Imagination launches the MIPS I6500-F, CPU IP designed for safety-critical systems in an autonomous age (Wednesday Jun. 14, 2017)
  Imagination Technologies announces a highly-scalable 64-bit MIPS multiprocessing solution that has been stringently assessed and validated to meet functional safety (FuSa) compliance for ISO 26262 and IEC 61508 standards.
  
  
• Arasan Announces Advanced Process Nodes for High Performance SD Card UHS-II Physical Layer Interface (Wednesday Jun. 14, 2017)
  Arasan Chip Systems, a leading provider of semiconductor IP for mobile and automotive SoCs, announces availability of its SD Card UHS-II analog physical interface IP Core in advanced process nodes.
  
  
• ReFLEX CES Partners with Orthogone Technologies to Provide Integrated Ethernet MAC/PCS IP Core Solutions on FPGA COTS Boards (Wednesday Jun. 14, 2017)
  Orthogone Technologies, a provider of industry-leading semiconductor IP and electronic product design services, today announced their strategic alliance with ReFLEX CES, a leading provider of complex, high-density FPGA-based boards.
  
  
• CAST Drives Automotive IP Forward with New AVB/TSN Ethernet and SAE J2716 Sensor Bus Cores plus CAN-FD Time-Stamping (Tuesday Jun. 13, 2017)
  Semiconductor intellectual property provider CAST, Inc. today announced three significant improvements to its automotive IP family. New IEEE 802.1AS AVB/TSN and SENT/SAE J2716 Cores now available; CAN/CAN-FD Controller Core now supports AUTOSAR-compliant time-stamping
  
  
• Silab Tech Announces Release of XGS-PON SERDES IP Core (Monday Jun. 12, 2017)
  Silab Tech, a leading supplier of high speed serial interface intellectual property designs (IP cores) announced today the release of its XGS-PON PHY. This IP Core provides symmetrical 10Gbps interconnect solution for Next Generation Passive Optical Networks (PON).
  
  
• Uniquify's LPDDR4 Super Combo Interface IP in Volume Production at 28nm Low-power Node (Wednesday Jun. 07, 2017)
  Uniquify today announced that its LPDDR4 Super Combo IP for the 28-nanometer (nm) low-power semiconductor process node is in volume production.
  
  
• Synopsys' Complete CCIX IP Solution Enables Cache Coherency for High-Performance Cloud Computing SoCs (Tuesday Jun. 06, 2017)
  Synopsys today announced immediate availability of its complete DesignWare® CCIX IP solution, consisting of controller, PHY and verification IP delivering data transfer speeds up to 25Gbps and supporting cache-coherency for high-performance cloud computing applications.
  
  
• Rambus and Synopsys Collaborate to Deliver Provisioning Services for Hardware Secure Modules (Monday Jun. 05, 2017)
  Rambus and Synopsys today announced a new collaboration to accelerate the adoption of advanced security platforms and technologies to protect valuable assets during key and device provisioning.
  
  
• Synopsys and Mellanox Demonstrate Complete PCI Express 4.0 Host and Device System Interoperability (Monday Jun. 05, 2017)
  Synopsys, Inc. today announced it has collaborated with Mellanox Technologies to successfully demonstrate full system interoperability between their two independently developed PCI Express® 4.0 solutions.
  
  
• EnSilica develops sureCore's new, Ultra-Low Power IoT reference platform (Monday Jun. 05, 2017)
  EnSilica, a leading independent provider of semiconductor solutions and IP, and sureCore, the low power SRAM IP leader, have announced that EnSilica has developed sureCore’s new, ultra-low power IoT reference platform targeted principally at the development of the next generation of wearable consumer and medical applications.
  
  
• Chips&Media announced Image Signal Processing (ISP) IP family targeting surveillance and automotive products (Thursday Jun. 01, 2017)
  Chips&Media, Inc., announced the introduction of new Image Signal Processing(ISP) IPs targeting Surveillance and Automotive products. New IP families are developed to specifically support 2MP, 5MP and 8MP sensors and specialized to meet demands of surveillance and automotive products, such as low light environment optimization.
  
  
• CAST Adds DO-254 Avionics Interface Cores though New Partnership with Nolam (Thursday Jun. 01, 2017)
  Semiconductor IP provider CAST, Inc. today announced a new partnership with Nolam Embedded Systems, and the resulting availability through CAST of several Nolam avionics-related IP cores.
  
  
• PLDA at the Epicenter of PCIe 4.0 Wave of Adoption with Recent PCIe Design Conference Achievements and Testing Success for PLDA's Gen4SWITCH (Thursday Jun. 01, 2017)
  PLDA, the industry leader in PCI Express® interface IP solutions, today highlighted recent PCIe® 4.0 milestones, including information and feedback gleaned from its PLDA Design Days event in Shanghaï, as well as its achievements from April’s PCIe-SIG Compliance Workshop testing.
  
  
• Flex Logix Delivers High-Performance, High-Density Embedded FPGA for Deep Learning, Data Center and Base Station Chips (Wednesday May. 31, 2017)
  Flex Logix™ Technologies, Inc., a leading developer of embedded FPGA IP cores and software, today announced it has completed design of its second-generation high-performance IP core for TSMC 16FF+ and 16FFC processes. Enabling embedded FPGA arrays greater than 100,000 LUTs, the new Flex Logix core enables chips to be easily customizable and upgradeable in-field.
  
  
• Synopsys Integrates VESA Display Stream Compression into DesignWare MIPI DSI IP to Enable 4K Ultra HD and Higher Resolution Displays (Wednesday May. 31, 2017)
  Synopsys, Inc. (Nasdaq:SNPS) today announced its integrated DesignWare® MIPI DSI Host Controller IP with the Video Electronics Standards Association (VESA®) Display Stream Compression (DSC) encoder, delivering a complete display IP solution for mobile, augmented/virtual reality and automotive SoCs.
  
  
• Atomic Rules announces DPDK-aware FPGA/GPP data mover (Tuesday May. 30, 2017)
  Atomic Rules, a reconfigurable computing IP firm, is pleased to announce the launch of Arkville, a DPDK-aware FPGA/GPP data mover enabling Linux DPDK applications to offload server cycles to FPGA gates.
  
  
• Programmable Battery Charger IPs For SoC Applications (Monday May. 29, 2017)
  Chipus is building out its power management offerings by expanding its line of battery charger IPs, designed for modern mobile and IoT applications, where battery powered solutions are ubiquitous.
  
  
• Synopsys Announces Availability of DesignWare IP on Samsung 14LPP and 10LPP Process Technologies (Wednesday May. 24, 2017)
  Synopsys, Inc. (Nasdaq:SNPS), today announced availability of a broad portfolio of DesignWare® IP on Samsung Electronics' 14LPP and 10LPP process technologies including USB 3.1/3.0/2.0, PCI Express® 4.0, HDMI 2.1/2.0, LPDDR4 and DDR4.
  
  
• SST Announces Qualification of Smartbit OTP NVM Technology for ON Semiconductor's 110 nm CMOS Process (Wednesday May. 24, 2017)
  Microchip Technology through its Silicon Storage Technology (SST) subsidiary announced that ON Semiconductor, driving energy efficient innovations, has qualified SST’s Smartbit™ One-Time Programmable (OTP) Non-Volatile Memory (NVM) technology for SP110, ON Semiconductor’s 110 nm process node.
  
  
• New SHA-3 hashing IP from Barco Silex helps customers implement future-proof security (Wednesday May. 24, 2017)
  Barco Silex has added the new SHA-3 hashing functions to its extensive offering of IP blocks. Hashing functions are used to check the integrity of messages, transactions and data in, e.g., e-commerce, financial applications or data archiving. SHA-3 hashing is part of the NIST-endorsed FIPS 202 standard and serves as a future-proof backup for the widely-used SHA-2 algorithms.
  
  
• Sidense SHF Memory Macros Target IoT and Other Very Low Power Applications in TSMC's 40ULP Process (Tuesday May. 23, 2017)
  Sidense Corp., a leading developer of non-volatile memory (NVM) IP cores, today announced that the Company’s 1T-NVM macros for TSMC’s 40ULP process have met all TSMC9000 IP Quality Management Program requirements.
  
  
• Synopsys' New Superscalar ARC HS Processors Boost RISC and DSP Performance for High-End Embedded Applications (Tuesday May. 23, 2017)
  Synopsys, Inc. (Nasdaq: SNPS) today announced availability of the new DesignWare® ARC®HS4x and HS4xD processor family for high-performance embedded applications. The ARC HS44, HS46, HS48, HS45D and HS47D processors, available in single-, dual- and quad-core configurations, implement a dual-issue superscalar architecture that delivers up to 6000 DMIPS per core, making it the highest performance processor in the popular ARC HS family.
  
  
• RFEL's Wideband Channeliser - ChannelCore Flex Now Available on the Ettus USRP X310 Platform (Tuesday May. 23, 2017)
  RFEL will be showcasing the latest significant release of its advanced FPGA-based channeliser IP – ChannelCore Flex™ – on stand 27 at EW Europe in London Olympia from 6th to 8th June 2017. The latest enhancement of this award winning IP now offers support for up to 16 wideband inputs, each capable of processing several GHz of bandwidth.
  
  
• IPrium releases 40G LDPC I.6 Encoder/Decoder for DWDM systems (Tuesday May. 23, 2017)
  FPGA intellectual property (IP) provider IPrium LLC (www.iprium.com) today announced that it has expanded its family of Super-FEC IP products with a new OTU3 40G I.6 LDPC Codec IP Core for the G.975.1 standard.
  
  
• Synopsys Delivers Industry's First Multi-Protocol 25G PHY IP in 7-nm FinFET Process (Monday May. 22, 2017)
  Synopsys today announced its new DesignWare® Multi-Protocol 25G PHY IP for high-performance computing applicationslligence. The PHY IP gives designers the flexibility to efficiently integrate multiple protocols including PCI Express® 4.0, 25G Ethernet, SATA and CCIX into system-on-chips (SoCs) targeting the 7-nanometer (nm) and 16-nm FinFET processes
  
  
• Dolphin Integration unveils its new generation of 32-kHz oscillators for IoT and wearable applications (Monday May. 22, 2017)
  Dolphin Integration announces today the addition of ultra-low power 32.768- kHz oscillators dedicated to always-on power domains, at 55 nm and at 22 nm.