The capless LDO IP core is optimized for high performance fast switching digital applications (e.g. DDR and GDDR). The capless LDO IP core can hold a steady output voltage reference with less than +/- 5% overshoot/undershoot without using an external capacitor. The LDO uses Vidatronic's Noise Quencher (TM) technology to provide unparalled power supply rejection at high frequencies.
- Contact vendor for specific features.
- Adds value to your microchip with embedded power management
- Fewer components and smaller board area (NO external capacitor)
- Improved reliability
- Reduced inventory and reduced BOM management overhead
- Longer battery life (save power through integration)
- Low risk for customer product/program with a silicon proven capless LDO IP core.
- Datasheet and user’s guide with integration guidelines
- Behavioral simulation model
- Schematics and/or spice netlist
- Layout (GDSII)
- Integration and test support