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MIPI D-PHY Rx-Only 4 Lanes in TSMC (40nm, 28nm, 22nm, 16nm, 12nm, N7, N6)
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PCI/PCIX Interface 2.5V Oxide Device - TSMC 65nm 65GP,LP,LP_EMF
Dolphin's hardened DDR2/3/4 SDRAM PHY and LPDDR2/3 SDRAM PHY IP is a silicon-proven, Combo PHY supporting speeds up to 2133 Mbps. It is fully compliant with the DFI 3.1 specification, and features include slew rate control, per-bit de-skew, gate training, read and write leveling and built-in self test (BIST).
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