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Syntill8's Two-Wire slave IP for use with the Mentor M8051W and M8051EW
The M2WIS adds two-wire slave capability to M8051W and M8051EW designs. Use of standard synchronous design methodology makes this core simple to integrate into both ASIC and FPGA SoC designs.
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Block Diagram of the Syntill8's Two-Wire slave IP for use with the Mentor M8051W and M8051EW
