Test and Verification Solutions offers an AXI4-Lite UVM/OVM Master VIP as part of its asureVIP™ series of offerings. This is a highly flexible and configurable verification IP, which can be easily integrated into any SOC verification environment. The Master VIP has been interoperability tested with a Slave VIP configuration.
The VIP comes with a Bus Monitor for performing all protocol checks. The monitor also performs key protocol checks and reports errors for non compliance with ARM AMBA AXI and ACE Protocol Specification.
The VIP has been verified for protocol compliance with asureSign – TVS’ own Requirements Traceability tool.
- Supports all transaction burst length 1
- Supports Data bus width 32/64-bit
- Supports write Strobes
- Supports multiple outstanding transactions
- Highly Flexible, Independent and Configurable AXI-Lite Master VIP
- Proven against Silicon Proven VIP
- Less turnaround time in integrating into SOC Verification environments
- VIP user Guide
- AXI-Lite Master UVM/OVM VIP
- Sample Scoreboard
- Sample Virtual Sequencer
Block Diagram of the AXI4-Lite UVM/OVM SV based Master Verification IP