Synopsys VC Verification IP (VIP) for ARM® AMBA® 5 CHI protocol specification provides a comprehensive set of protocol, methodology, verification and productivity features, enabling users to achieve rapid verification of AMBA 5 CHI-based interconnects and interfaces. AMBA 5 CHI works in conjunction with Synopsys AMBA 4 VIP to provide a complete system solution for AMBA 5 CHI-based designs.
- AMBA 5 CHI master, slave and monitor
- Complete port-level checks
- Supports all interface types
- AMBA 5 CHI system monitor provides system-wide protocol and data integrity checks
- AMBA 5 CHI system environment encapsulates CHI masters, slaves, monitors, interconnect environment
- AMBA system environment encapsulates CHI and other AMBA protocols
- VC VIP AMBA 5 CHI is integrated with Protocol Analyzer, a protocol-centric debug environment that gives users an easy to understand, graphical view of complex and highly interleaved traffic.
- VC VIP AMBA 5 CHI is written entirely in SystemVerilog to run natively in any simulator for optimal performance.
- Testbench development is accelerated with the assistance of built-in verification plans, coverage, sequences and example.
Block Diagram of the VC Verification IP for AMBA 5 CHI