Wide-ranging strategies tackle signal snarls

Wide-ranging strategies tackle signal snarls
By Ron Wilson, EE Times
September 10, 2002 (3:18 p.m. EST)
URL: http://www.eetimes.com/story/OEG20020906S0076

From the unassuming phrase "signal processing in wireless systems," it may not be obvious just how enormous a range of system designs fits into the category. Certainly, we were surprised at the diversity of design requirements and implementations that showed up when we called for articles on the topic for this week's In Focus section.

At one extreme — perhaps the end of the spectrum on which the press concentrates most — are the high-end horror stories. Third-generation cell-phone handsets, we are told, may require several thousands of Mips of signal-processing horsepower just to capture a signal and wring data packets from it — a challenge to ponder while palming one of those tiny cell-phone battery packs.

At the other extreme, a careful job of proprietary network design can reduce signal-processing requirements enormously — in the case of our lead article this week, to within the range of an augmented 8-bit microcon troller.

In between lies a huge range of design requirements and implementation strategies. There are perhaps three independent variables to examine here. The first, obviously, is the sheer processing power needed to achieve, maintain and use a connection. This variable is sensitive to coding schemes and bandwidth. Less obviously, it can also be highly dependent on the decisions made by the antenna, RF and IF analog designers, particularly for basestations.

The second dimension to the problem is further up the protocol stack, at the application level. Increasingly, wireless terminals require signal-processing services not just to receive the packets but to act on the payload as well. For instance, digital telephony presumes digital voice compression on a DSP. Wireless data networking generally includes forward error correction and encryption. And many of the as-yet-unproved 3G cellular services appear to assume the presence of quite sophisticated video- and image-processing hardware in the h andset.

The third dimension is the implementation segment. The cell-phone market again makes an interesting example. In the good old days when GSM was a French acronym, DSP meant dropping a compact, low-performance digital signal processor core into the system chip to handle voice coding. Today, DSP core vendors are trying to hang onto their sockets not just by increasing power but with external digital filter engines and even image-processing primitives to handle MPEG video coding. ASIC vendors are offering libraries tuned to the needs of the handset and basestation markets. And FPGA vendors are making inroads with huge — and startlingly expensive — FPGAs loaded with hardware multipliers.

The contributors to this section, both in print and online, reflect this multivariate diversity. Greg Ratzel a senior system architect for wireless-network vendor Cirronet Inc. (Atlanta), leads off with a piece illustrating how an 8-bit MCU tightly coupled to a small FPGA can handle a surprisingly complex control and signal-processing load. The second contribution, by Rodger Hosking from FPGA application house Pentek Inc. (Saddle River, N.J.), shows the opposite end of the spectrum: a wideband digital receiver implemented in a single large FPGA.

Texas Instruments architecture/SoC manager Pete Cumming discusses the significance of developing a wireless system-on-chip platform architecture with a standard socket interface. And researchers Stuart McGarrity of the The MathWorks (Natick, Mass.) and Randy Durrant of Intel Corp.'s Mobile Platforms Group describe a format and processing requirements for passing digitized voice over a Bluetooth link.

On the Web, an exclusive piece from engineers at Synopsys Professional Services in Germany details the generation of a configurable one-off CPU with specialized instruction-set extensions to handle signal-processing tasks in a digital video broadcast receiver. Signal-processing software vendor HelloSoft takes a similar approach to a CPU/DSP combi nation for an 802.11b terminal. And, Texas Instruments' R. Stephen Preissig and Jay Srage describe a conventional high-end DSP core with video instruction-set extensions.

Meanwhile a system-level design piece by David Spreadbury, principal technology consultant with Plextek Ltd, (Great Chesterford, Essex) provides details on a DSP broadband modem for mesh radio — a complicated environment that combines raw signal processing, flexiblity and intelligenc in a small space. Spreadbury looks at the hardware and design requirements needed for the monitoring and control functions and offers his advice on how simplicity and careful planning in areas such as task partitioning and interfacing can result in a high-performance DSP-based wireless product.

Thus,the range of application needs — from simple CRCs and record-keeping to high-speed rake filters, digital mixers and codecs, and even graphics functions — calls for a range of solutions, from just software to instruction-set extensions .

The common thread is that at every frequency, bandwidth and application node, the need for digital signal processing is there.

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