Headline (Last 30 Days) Sign Up for SoC News Alert  |
 | |
| |
| |
|
Articles for the Week of Aug. 28, 2008
|
| |
| |
| |
Featured Article
Upfront Analysis of Low Power Specification, Assertions and Testbench to Enable Reuse
This paper discusses the different aspects, in addition to the RTL, which should be checked for static errors and good coding practices to reduce design and verification cycle time. |
Additional Articles |
| |
|
Building a multi-voltage, high performance, ultra low standby power 32-bit MCU |
| |
|
A Semi-Automatic IP Distribution Tool |
| |
|
Capturing and communicating power-efficient design knowledge |
| |
|
Using FPGAs to improve your wireless subsystem's performance |
| |
|
Algorithmic synthesis improves designers' efficiency |
| |
| |
|
Articles for the Week of Aug. 21, 2008
|
| |
| |
| |
Featured Article
Collaborative Engineering Approach Towards IP-Based SoC Design
This paper introduces a visual knowledge-based modelling platform and a system enabling integration of distributed design tools that have been deployed in a distributed collaborative scenario of IP components design |
Additional Articles |
| |
|
Placement of different type nodes in a Network-on-chip graph |
| |
|
Microcontroller Design in FPGAs |
| |
|
Implementation of the AES algorithm on Deeply Pipelined DSP/RISC Processor |
| |
|
Achieving cache coherence in a MIPS32 multicore design |
| |
|
In-system programming of FLASH via control unit application |
| |
| |
|
Articles for the Week of Aug. 14, 2008
|
| |
| |
| |
Featured Article
Low Power High Speed All Digital Phase Locked Loops
In this paper an All Digital phase locked loop is proposed. This PLL can accomplish faster phase lock. Additionally, the functions of frequency comparator and phase detector have been improved and are well synchronized. |
Additional Articles |
| |
|
VLSI Based On Two-Dimensional Reconfigurable Array Of Processor Elements And Theirs Implementation For Numerical Algorithms In Real-Time Systems |
| |
|
How to analyze and reduce power using Libero IDE |
| |
|
Learning not to fear PCI Express compliance |
| |
|
Microcontroller architectures, then and now |
| |
|
Smart camera basics: Matching image sensor, analytics and processor performance |
| |
| |
|
Articles for the Week of Aug. 07, 2008
|
| |
| |
| |
Featured Article
Hardware Security Requirements for Embedded Encryption Key Storage
As the sophistication of global competitors and IP thieves in countries with weak IP protections increases, there exists an increased need for enhanced physical security for sensitive security information such as encryption keys. |
Additional Articles |
| |
|
AMASS Core: Associative Memory Array for Semantic Search |
| |
|
How to manage dynamic power in a microcontroller using its non-maskable interrupt |
| |
|
Antifuse memory IP fuels low-power designs |
| |
|
Going from GDSII to OASIS |
| |
| |
|
Articles for the Week of Jul. 31, 2008
|
| |
| |
| |
|
How to interface FPGAs to microcontrollers |
| |
|
Surveying the hardware-assisted verification landscape |
| |
|
Boost verification accuracy with low-power assertions |
