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MOSAID Ships 90nm SRAM Compiler with Industry's Lowest Power and Leakage
Single-port SRAM Compiler completes comprehensive Mobilize 90nm line OTTAWA, Ontario, Canada – April 25, 2006 - MOSAID today introduced a MOSAID Mobilize™ single-port SRAM compiler for leading 90nm foundries. The compiler produces SRAMS with the lowest power consumption, and the lowest leakage of any generic CMOS semiconductor IP (SIP) in the industry. Initial customers are actively designing SoCs and completing initial tape-outs with the complete 90nm Mobilize line. A 90nm Test Chip is currently under analysis. The Mobilize SRAMs employ MOSAID's patented Gate Bias power-management technology reducing SoC static leakage over 80 times and consuming 50 percent less power than conventional SRAMs or SRAM SIP, making them ideal for portable electronic products. "Based on silicon testing, Gate Bias is the best method to reduce leakage in 90nm generic CMOS," says Dan Hillman, MOSAID Vice President of Engineering. "As the geometries shrink to 65nm and below, the benefits provided by Gate Bias also increase significantly over other methods." Key features of the 90nm Mobilize Single-Port SRAM include industry-leading performance (600 MHz typical for a 64 kbit array), synchronous read/write operations, the ability to compile to multiple aspect ratios, a write-per-bit operation and an easy interface to industry-standard BIST controllers. Product Availability The Mobilize 90nm single-port SRAM compiler is available today. The dual-port SRAM compiler will be available in (CY) Q3 2006. For more information, please access the MOSAID Virtual Silicon Customer Center online at www.mosaid.com. About Mobilize The MOSAID Mobilize platform provides a unique, high-performance solution for managing active and static power. Because Mobilize IP is designed to a standard generic CMOS process with no special implants or triple-well required, it can easily integrate with third-party IP. Mobilize-based SoCs can be produced with the smaller area, lower cost and higher performance provided by the generic process, and with Gate Bias, have low leakage comparable to a more expensive, larger area low-power process. The Mobilize platform is fully integrated with leading EDA tools and design flows, allowing designers to dynamically optimize power and performance using standard tools. The complete 90nm line includes a standard-cell library, Power Island Manager, delta-sigma fractional-n PLL, single-port SRAM compiler and programmable basic I/O. About MOSAID
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