Cyclic Design Releases Advanced BCH Error Correction IP for Next Generation NAND Flash Applications
Cyclic Design announces advanced BCH ECC, supporting the next generation flash memory devices that require higher levels of error correction codes (ECC). Companies can preserve their investment in existing NAND flash hardware and software solutions by upgrading to this ECC infrastructure.
Austin, TX -- February 3, 2010 - Cyclic Design (cyclicdesign.com) has announced the availability of its BCH ECC solution for next-generation NAND flash controllers. This IP supports 1KB correction blocks with up to 32 bits of ECC per block, enabling support for NAND flash devices that will be on the market within the next year. With this IP, companies can preserve their investment in existing NAND flash hardware and software by upgrading only the error correction portion of their design instead of buying and integrating a new controller design.
Over the past several years, vendors have gradually increased the ECC capabilities in their NAND flash controllers to accommodate the ever-increasing bit error rates of NAND flash. Most controllers today support 16-bit corrections over 512 byte blocks, which is sufficient for today's MLC flash devices.
Next generation NAND flash, however, will require stronger error correction to maintain acceptable levels of data integrity. To accomplish this, error correction must be performed over 1KB data blocks with much higher levels of ECC - typically ECC24 or ECC28. The change in block size requires a full redesign of the ECC logic, which can be a daunting challenge for companies without ECC expertise.
According to Eric Deal, founder of Cyclic Design, "NAND controllers are typically integrated very tightly with other I/O logic, so it does not make sense to replace an existing solution with a brand new controller. Companies now have the option of replacing just the error correction logic, minimizing both hardware and software development costs."
Cyclic Design's IP is available in verilog and is designed for use in both standalone NAND flash controllers as well as high-performance SSD applications, where the error correction can be shared among several channels of NAND flash. It supports programmable selection of block sizes and ECC levels and is parametrized to support a variety of performance and ECC options. The design runs at 300 MHz in the TSMC 45nm LP process and is also compatible with FPGA applications.
About Cyclic Design, LLC
Cyclic Design provides IP and consulting services for the semiconductor industry. The company specializes in ECC and NAND flash technology but has a broad base of experience through its founder, Eric Deal, who has over 15 years of industry experience.
For additional information and data sheets on Cyclic Design ECC solutions, contact Eric Deal or visit http://cyclicdesign.com.
|
Related News
- Cyclic Design Announces Enhanced BCH ECC Portfolio: G14X IP Supports 64-bit Error Correction for NAND Flash Applications
- Evatronix enhances its NAND Flash Controller with OCP interface and BCH error correction code
- ECC Tek Announces Ultra-High-Performance Binary BCH Encoders and Decoders
- iSine Inc. Releases Extreme ECC(tm) for NAND Flash SOC's optimized for ASIC and Xilinx FPGA implementation
- Arasan proudly releases its Radiation Hardened NAND Flash IP
Breaking News
- Alphawave Semi announced today a refocussing of the Board of Directors after reaching the three-year milestone since the Company's IPO
- Synopsys and Samsung Electronics Collaborate to Achieve First Production Tapeout of Flagship Mobile CPU with Leading Performance on Samsung Foundry's GAA Process
- Worldwide Silicon Wafer Shipments Dip 5% in Q1 2024, SEMI Reports
- GOWIN's progress in global automotive market gathers momentum with award of ISO 26262 certification for its FPGA design environment
- PCI-SIG® Announces CopprLink™ Cable Specifications for PCIe® 5.0 and 6.0 Technology
Most Popular
- Silvaco Announces Launch of Initial Public Offering
- TSMC's A16 Process Moves Goalposts in Tech-Leadership Game
- Radiation-Tolerant PolarFire® SoC FPGAs Offer Low Power, Zero Configuration Upsets, RISC-V Architecture for Space Applications
- Synopsys Accelerates Next-Level Chip Innovation on TSMC Advanced Processes
- QuickLogic Releases Aurora 2.6 with Expanded Operating System Support and Up to 15% Faster Performance
E-mail This Article | Printer-Friendly Page |