Sinjin Dixon-Warren, ChipWorks
EETimes (1/21/2014 08:00 AM EST)
The Apple A7 processor used inside the iPhone 5s represents an extraordinary piece of engineering. At ChipWorks, we analyzed and discussed some of the Apple A7's details, such as the die layout, in an earlier blog.
The A7 is fabricated with Samsung’s 28nm low-power, gate-first, high-k metal gate (HKMG) process technology. The process features nine layers of copper metallization with low-k dielectrics, plus an additional top aluminum metal layer. This blog will focus on the front end of line (FEOL) transistor structure used in the A7, with comparison to advanced technologies used by both Apple and other vendors. The A7 gate-first transistor structure is based on the Common Platform Technology, which is an alliance of IBM, Samsung, and GlobalFoundries.
Chipworks has analyzed several generations of the Samsung process used to fabricate the A-series processors used in the iPhone and other Apple products. The A4 processor, released in September 2010, used a Samsung 45nm polysilicon transistor process technology with 180nm contacted gate pitch. The NMOS and PMOS transistor structures were essentially identical, with the main observable differences being in the materials used for the polysilicon gate and source/drain silicides.
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