While silos continue to be the best way to eke out efficiency, they don’t always work for semiconductor design.
Ed Sperling, Semiconductor Engineering
May 22nd, 2014
Operational silos within organizations have a long history of streamlining processes and maximize efficiency. In fact, that approach has made enterprise resource planning applications a must-have for most companies, and cemented the fortunes of giants such as SAP and Oracle, as well as the giant consulting companies that recommend them.
But those kinds of delineations don’t work so well for chipmakers—or at least not in all departments. The boundaries change too quickly, or in unexpected ways, to be able to establish firm corporate structures. An organization producing an advanced SoC needs a different structure, for example, than one building memory or MEMS chips. And frequently they need different operational structures within the same organization, depending upon how a chip will be used, what markets they are targeting, and how quickly it needs to be delivered and for what price point.
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