Barco Silex Standardizes on Blue Pearl Software - Transforms Its ASIC and FPGA Design Flows
Barco Silex, a high end digital design engineering company with extensive experience in ASIC, SoC, FPGA and IP Core designs, announced that it has adopted the Blue Pearl Software Suite to streamline its design flow.
Santa Clara, CA -- April 6, 2015 -- Barco Silex, a high end digital design engineering company with extensive experience in ASIC, SoC, FPGA and IP Core designs, announced that it has adopted the Blue Pearl Software Suite to streamline its design flow.
“Over the years, Barco Silex has developed a solid design methodology with a set of stringent rules and recommendations,” said Raphaël Gouthière, Quality Manager, Barco Silex. “By standardizing on the Blue Pearl Suite, we have automated and integrated the verification of coding rules and clock domain crossings in our design flow, helping us improve the quality of our designs.”
Barco Silex engineers are constantly challenged to meet the shrinking design schedules. By using Analyze RTL™, the designers have an easy and automated way to check and verify coding rules, which is very important for Barco Silex in order to maintain and/or improve the high quality of their designs. Another design challenge that Barco Silex faces is the multiplicity of clock domains. The Clock Domain Crossing (CDC) option from Blue Pearl helped its engineers verify all the clock domain crossings in their design. Moreover, Barco Silex required the new capabilities to be easily integrated in the design flow. Blue Pearl Software not only provided a scripting language that facilitates integration, but Barco Silex welcomed their support of the main FPGA vendor libraries.
“Blue Pearl Software is focused on automating FPGA and IP verification before debugging starts,” said Ellis Smith, Chairman and CEO, Blue Pearl Software. “We are helping Barco Silex to continue the development of high quality designs by automating design analysis and CDC checks.”
Price and Availability
Release 9.0 of the Blue Pearl Software Suite is available now. Please contact sales(at)bluepearlsoftware(dot)com to arrange a demo, or for additional pricing and upgrade information.
The Blue Pearl Software Suite is also available for online purchase via the Embedded Software Store or the Blue Pearl Software online store. For more information about the online stores, please visit http://embeddedsoftwarestore.com/store or https://store.bluepearlsoftware.com/1112/catalog/catalog.1018/ .
For more information about Blue Pearl Software, please visit http://www.bluepearlsoftware.com.
About Blue Pearl Software
Blue Pearl Software, Inc. provides EDA software that accelerates FPGA design verification. The company’s Blue Pearl Software Suite checks RTL designs for functional errors and automatically generates comprehensive and accurate Synopsys Design Constraints (SDC) to improve quality of results (QoR) and reduce FPGA design risks.
Visit Blue Pearl Software at http://www.bluepearlsoftware.com.
About Barco Silex
Barco Silex is leader in video processing, encryption and security IP cores and platforms as well as electronic design services (ASIC, FPGA, DSP, Board). Thanks to its continued stream of innovations, Barco Silex provides state-of-the-art solutions in video, encryption and security. Barco Silex security platforms and encryption cores deliver unrivaled speed performance and compact footprint.
For more information about Barco Silex: http://www.barco-silex.com
|
Related News
- Toshiba Information Systems Adopts Blue Pearl Software Visual Verification Suite by to Improve Quality and Accelerate FPGA and ASIC Development
- Blue Pearl Software Visual Verification Suite 2016.2 Simplifies ASIC, FPGA and IP RTL Verification
- Blue Pearl Software and NanoXplore SAS team to Accelerate Development and Verification of Radiation Hardened FPGA Designs
- Blue Pearl Software Streamlines RTL Verification for Xilinx All Programmable FPGAs and SoCs
- Barco Silex validates interoperable VC-2 lightweight video compression solution for ASIC/FPGA - ready for UHD and 4K transport
Breaking News
- Thalia's AMALIA 24.2 introduces pioneering estimated parasitics feature to reduce PEX iterations by at least 30%
- TSMC plans 1.6nm process for 2026
- Qualitas Semiconductor Partners with TUV Rheinland Korea to Enhance ISO 26262 Functional Safety Management System
- M31 has successfully launched MIPI C/D PHY Combo IP on the advanced TSMC 5nm process
- Ceva multi-protocol wireless IP could simplify IoT MCU and SoC development
Most Popular
- Controversial former Arm China CEO founds RISC-V chip startup
- Siemens collaborates with TSMC on design tool certifications for the foundry's newest processes and other enablement milestones
- Credo at TSMC 2024 North America Technology Symposium
- Synopsys Accelerates Next-Level Chip Innovation on TSMC Advanced Processes
- Kalray Joins Arm Total Design, Extending Collaboration with Arm on Accelerated AI Processing
E-mail This Article | Printer-Friendly Page |