NetSpeed Introduces the industry's first fully configurable cache-coherent network-on-chip
San Jose, Calif. -- October 6, 2015—NetSpeed Systems Inc., the supplier of on-chip network IP that is streamlining SoC design, announced the release of its Gemini 2.0 product, the industry’s first fully configurable cache-coherent network-on-chip IP. The new release adds a number of advanced features that make it faster and easier for SoC architects to configure interconnect solutions that are highly optimized for specific applications.
“A major challenge for next generation SoC designs is the explosion of compute clusters and demand for ultra-low latency memory access,” said Sundari Mitra, CEO of NetSpeed Systems. “Gemini 2.0 fills the need for manufacturers that want to use innovative cache coherent designs to squeeze more performance from their designs. Gemini offers them far more configurability than other coherency solutions with better performance, power and area.”
“Configuring coherent systems has traditionally required specialized expertise that few SoC designers possess,” said Fred Weber, former CTO of AMD and member of NetSpeed’s board of directors. “However, NetSpeed has developed a sophisticated and resilient method of configuring cache in coherent systems that uses automation and algorithms to ensure that the resulting interconnect is high performance, functionally correct and deadlock-free.”
Gemini 2.0 is a development platform for architecting efficient cache-coherent interconnects for a wide variety of SoC applications. It uses a requirements-driven design approach that enables architects to work at a higher level of abstraction. Based on system requirements such as cache capacity and total coherent bandwidth, Gemini adds critical coherency components, and customizes them before placing them in the interconnect. Gemini uses a distributed architecture and an innovative directory-based design that enables architects to scale both the interconnect fabric and the coherency components up or down independently. The latest version of Gemini also offers NetSpeed Pegasus - an optimized last-level cache, and an accelerator for I/O-coherent traffic — which is ideal for GPU-like IPs.
NetSpeed’s Gemini IP was first introduced in the fall of 2013 to offer customers a highly configurable, latency-optimized solution for today’s heterogeneous architecture designs. It is currently used by Altera and other early adopter customers in advanced process nodes.
NetSpeed Gemini 2.0 adds advanced features that make it faster and easier for SoC architects to configure interconnect solutions that are highly optimized for specific applications.
About Gemini
Gemini is a scalable high-performance on-chip network IP solution that provides full cache coherency for small and large SoC designs. It supports all three levels of coherent traffic including cache-coherent, I/O-coherent & non-coherent traffic – in a single on-chip network. NetSpeed Gemini's unique architecture allows it to scale performance to match increasing coherency bandwidth. This allows NetSpeed Gemini to be used as NoC platform for entire product families. The underlying hardware elements, like the coherency controller, coherency directory and NoC router are designed for supporting higher throughput – Terabits per second – with a lower footprint. Gemini delivers high performance and significant time-to-market advantages to SoC designers for a wide range of markets including mobile, networking and enterprise computing.
About NetSpeed Systems, Inc.
NetSpeed Systems provides scalable, coherent on-chip network IPs to SoC designers for a wide range of markets from mobile to high-performance computing and networking. NetSpeed's on-chip network platform delivers significant time-to-market advantages through a system-level approach, a high level of user-driven automation and state-of-the-art algorithms. NetSpeed Systems was founded in 2011 and is led by seasoned executives from the semiconductor and networking industries. The company is funded by top-tier investors from Silicon Valley. It is based in San Jose, California and has additional research and development facilities in Asia. For more information, visit www.netspeedsystems.com.
|
Related News
- Altera licenses NetSpeed's Gemini - Configurable Cache Coherent Network-on-Chip IP
- Lightelligence Revolutionizes Big Data Interconnect with World's First Optical Network-on-Chip Processor
- NetSpeed Releases Gemini 3.0 Cache-Coherent NoC IP to Supercharge Heterogeneous SoC Designs
- Peraso Introduces Industry's Smallest Fully Integrated 60 GHz Transceiver
- Triad Semiconductor Introduces the World's Smallest High Voltage Via Configurable Array
Breaking News
- Thalia's AMALIA 24.2 introduces pioneering estimated parasitics feature to reduce PEX iterations by at least 30%
- TSMC plans 1.6nm process for 2026
- Qualitas Semiconductor Partners with TUV Rheinland Korea to Enhance ISO 26262 Functional Safety Management System
- M31 has successfully launched MIPI C/D PHY Combo IP on the advanced TSMC 5nm process
- Ceva multi-protocol wireless IP could simplify IoT MCU and SoC development
Most Popular
- Controversial former Arm China CEO founds RISC-V chip startup
- Siemens collaborates with TSMC on design tool certifications for the foundry's newest processes and other enablement milestones
- Credo at TSMC 2024 North America Technology Symposium
- Synopsys Accelerates Next-Level Chip Innovation on TSMC Advanced Processes
- Kalray Joins Arm Total Design, Extending Collaboration with Arm on Accelerated AI Processing
E-mail This Article | Printer-Friendly Page |