SystemC seen accelerating simulation
SystemC seen accelerating simulation
By Richard Goering, EE Times
February 26, 2003 (11:25 a.m. EST)
URL: http://www.eetimes.com/story/OEG20030226S0013
SAN JOSE, Calif. SystemC is seeing increasing use as a way of accelerating simulation, according to speakers at the DVCon Design and Verification Conference. Meanwhile, speakers noted important milestones coming up in 2003 for the Open SystemC Initiative's (OSCI) standardization efforts.
Related News
- Imperas RISC-V Solutions for Developers - Accelerating RISC-V
- MachineWare announces new ARM processor simulation and SystemC profiling products, adds Windows support
- CoFluent Design Adds Embedded C Code Generation to its UML and systemC-Based Modeling and Simulation Toolset
- intoPIX Unveils Titanium at NAB for Accelerating IP Media Workflows
- Siemens to demonstrate first pre-silicon simulation environment for Arm Cortex-A720AE for Software Defined Vehicles
Breaking News
- Ceva multi-protocol wireless IP could simplify IoT MCU and SoC development
- Controversial former Arm China CEO founds RISC-V chip startup
- Fundamental Inventions Enable the Best PPA and Most Portable eFPGA/DSP/SDR/AI IP for Adaptable SoCs
- Cadence and TSMC Collaborate on Wide-Ranging Innovations to Transform System and Semiconductor Design
- Numem at the Design & Reuse IP SoC Silicon Valley 2024
Most Popular
- GUC provides 3DIC ASIC total service package to AI/HPC/Networking customers
- Qualitas Semiconductor Appoints HSRP as its Distributor for the China Markets
- Siemens collaborates with TSMC on design tool certifications for the foundry's newest processes and other enablement milestones
- Credo at TSMC 2024 North America Technology Symposium
- Huawei Mate 60 Pro processor made on SMIC 7nm N+2 process
E-mail This Article | Printer-Friendly Page |