Analog Bits to Demonstrates Low Latency PCIe/CXL Gen 5 on Samsung 8nm at SAFE Forum 2021
Sunnyvale, CA, November 16, 2021 - Analog Bits, the industry’s leading provider of low-power mixed-signal IP (Intellectual Property) solutions will be presenting their paper: "PCIe/CXL SERDES- Gen4/5 Enterprise Class SerDes & Lowest Power Gen3/4 Consumer SERDES in Samsung 28nm to 5nm Processes" at Samsung Advanced Foundry Ecosystem (SAFE) Forum.
"Analog Bits low latency SERDES is a key differentiator for high-end enterprise SSD’s and Re-timer SoC’s that are optimizing for performance and throughput," said Mahesh Tirupattur, Executive Vice President at Analog Bits. “And our close collaboration with Samsung gives us the opportunity to help our mutual customers deliver the best possible latency and performance to the end customers in Gen5 and Gen6 in future. We truly appreciate our years of strategic partnership with Samsung.”
When: November 17-18, 2021
Resources
To learn more about Analog Bits' foundational analog IP, visit www.analogbits.com or email us at info@analogbits.com.
About Analog Bits
Founded in 1995, Analog Bits, Inc. (www.analogbits.com), is the leading supplier of mixed-signal IP with a reputation for easy and reliable integration into advanced SoCs.
Our products include precision clocking macros, Sensors, programmable interconnect solutions such as multi-protocol SERDES and programmable I/O’s. With billions of IP cores fabricated in customer silicon, from 0.35- micron to 3nm processes, Analog Bits has an outstanding heritage of "first-time-working” with foundries and IDMs.
|
Related News
- Samsung and Its Foundry Partners Reveal Solutions for a Strong Design Infrastructure at 3rd SAFE Forum 2021
- Analog Bits to Present Papers, Demo of N5 Working Silicon, and Roadmap on IPs for TSMC N4 and N3 Processes
- Silex Insight extends their AES-GCM Crypto Engine offering by introducing an ultra-low latency version for PCI Express 5.0 and Compute Express Link 2.0
- Analog Bits to demonstrate Low Power SERDES at TSMC's Open Innovation Platform Ecosystem Forum
- PLDA and Analog Bits Partner to Provide a Silicon-proven PCIe 3.0 Solution for leading 28nm low power process
Breaking News
- Alphawave Semi announced today a refocussing of the Board of Directors after reaching the three-year milestone since the Company's IPO
- Synopsys and Samsung Electronics Collaborate to Achieve First Production Tapeout of Flagship Mobile CPU with Leading Performance on Samsung Foundry's GAA Process
- Worldwide Silicon Wafer Shipments Dip 5% in Q1 2024, SEMI Reports
- GOWIN's progress in global automotive market gathers momentum with award of ISO 26262 certification for its FPGA design environment
- PCI-SIG® Announces CopprLink™ Cable Specifications for PCIe® 5.0 and 6.0 Technology
Most Popular
- Silvaco Announces Launch of Initial Public Offering
- TSMC's A16 Process Moves Goalposts in Tech-Leadership Game
- Radiation-Tolerant PolarFire® SoC FPGAs Offer Low Power, Zero Configuration Upsets, RISC-V Architecture for Space Applications
- Synopsys Accelerates Next-Level Chip Innovation on TSMC Advanced Processes
- QuickLogic Releases Aurora 2.6 with Expanded Operating System Support and Up to 15% Faster Performance
E-mail This Article | Printer-Friendly Page |