The Audio Codec IP core is a complete high quality, low power audio codec for
portable applications that includes the functions of Analog (A)-to-Digital (D) and
D-to-A conversion, channel filtering, microphone, line and headset interfacing and
Oversampling sigma delta technology is used in both Record (ADC) and Playback
(DAC) conversion channels. The channel filters are implemented digitally, embedded
in the decimation and interpolation filters associated with the converters.
Line in/out, Microphone and Headset Drivers are included offering a complete
coverage of most common analog interfacing.
Individual volume control schemes allow maximum flexibility on combining different
record and playback functions.
The Audio Codec IP operates a master or slave. The master clock can be 12 MHz,
24 MHz, 256 or 384 times the sampling frequency and the I2S Digital Audio Interface
allows sampling rates from 8 to 192 kHz, including the popular 44.1 kHz, 48 kHz and
192 kHz audio rates.
External component requirements are extremely reduced as no separate microphone
amplifier, microphone bias, headphone driver or references are required.
- 2 stereo single ended lin / headset / 250mW loudspeaker output
- Audio sampling rates from 8 - 192kHz
- System power on/off pop suppression
- Built in microphone bias
- Analog and digital gain with soft ramp control
- Multiple PLL-less master clock frequencies: 256 or 384 x Fs, USB 12/24MHz and fixed audio 12.288/18.423Mhz
- 24-bit D/A and A/D conversion
- 90dB Dynamic range and -80dB THD A/D conversion
- 96dB Dynamic range and -86dB THD D/A conversion
- 3 stereo single ended / differential line-in and microphones
- Databook, Behavior Verilog Model
- Abstract LEF and Timing Lib files
- GDSII Layout Database
- Assembly Guidelinesa and Full Integration Support