This core integrates four SaberTek WLAN IP cores, SBR_RX_2G5G_T65_1, SBR_TX_2G5G_T65_1, SBR_SX_3G4G_T65_1, and SBR_LOCHAIN_2G5G_1. It also includes the supporting blocks such as bias and SPI needed to form a complete dual-band Wi-Fi transceiver.
The receive path (RX) has very high dynamic range and is implemented with dual-downconversion, zero-IF architecture. A direct-conversion TX generates high EVM signals to drive the external power amplifier. A fully integrated fractional-N frequency synthesizer generates 3.2~4 GHz LO signals with low phase noise and the LOCHAIN generates required LO signals for TX and RX signals.
SaberTek offers an extensive portfolio of silicon-proven intellectual properties (IPs) covering all aspects of wireless transceivers for Wi-Fi, WCDMA, LTE, mmWave, and GPS among others. These cores cover a wide variety of SiGe and CMOS process technologies, process nodes, and cover a frequency range of DC to 100 GHz.
- Fully integrated dual-band WLAN transceiver
- Fully compliant to IEEE 802.11 a/b/g/n/ac standards
- Process: TSMC 65nm LP RF CMOS process
- Rx has great dynamic range
- Low phase-noise fractional-N frequency synthesizer
- Very low power consumption
- Dual down-conversion receiver architecture
- High EVM transmitter
- Easily scalable to higher order MIMO configurations
- Very small die area
- Single supply of 1.2V
- Wireless LAN (WLAN) IEEE 802.11 a/b/g/n/ac