CEVA-TeakLite-4 is a low-power, native 32-bit, variable 10-stage pipeline, fixed-point DSP architecture framework. The CEVA-TeakLite-4 is a fully synthesizable, process-independent design that allows the SoC designer to select the optimal implementation in terms of silicon area, power consumption, and operating frequency.
The CEVA-TL410, CEVA-TL411, CEVA-TL420, and CEVA-TL421 DSP cores are based on, and compliant to, the high-performance, low-power CEVA-TeakLite-4 DSP architecture.
With a primary target of standalone DSP chips used to implement audio CODECs, audio D-Class amplifiers, and noise-reduction chips, the ultra-low-power CEVA-TL410 DSP core offers the smallest die size with its single 32x32-bit MAC, dual 16x16-bit MACs, and direct memory interface. If higher performance is required, the CEVA-TL411 core provides dual 32x32-bit MACs and quad 16x16-bit MACs.
Alternatively, for CPU-centric SoCs, such as the application processors and main SoCs used in smartphones, digital televisions (DTVs), set-top boxes (STBs), and game consoles, the CEVA-TL420 augments the features of the CEVA-TL410 with data and instruction cache controllers and a master/slave AXI system interface (the CEVA-TL421 augments the CEVA-TL411 with the same high-end capabilities). All CEVA-TeakLite-4 architecture-compliant cores are fully compatible with each other and with previous generation CEVA-TeakLite family cores.
- Small size and ultra-low-power
- 100K gates area optimized
- Native 32-bit, Harvard/SIMD architecture DSP with multiple options:
- 1/2/4 32x32-bit multipliers
- 2/4 16x16-bit multipliers
- 32-bit register file
- Automatic 32-bit saturation
- 72-bit MAC accumulation for wide dynamic range
- Optional tightly-coupled instruction sets
- Easy software development
- Optimizing C compiler
- Cycle-accurate simulation and graphical profiling of the entire
- DSP sub-system
- Macro assembler, linker, and GUI debugger
- Tight MATLAB bi-directional connectivity
- CEVA-TeakLite-4 DSP cores can be used for applications that are highly sensitive to die-area and power consumption
- CEVA-TeakLite-4 DSP cores support the toughest audio and voice use cases
- Supported by a broad range of fully-certified HD-Audio and voice codecs
- Smooth C-level software development and easy integration into target SoC reduces risk and time-to-market