The DesignWare® Multipurpose Security Protocol Accelerator offers designers unprecedented configurability to address the complex security requirements that are commonplace in today's multi-function, high-performance SoC designs. Increasingly, these designs include security at the MAC layer (e.g. WiMAX, Wi-Fi, MACsec or 3GPP/LTE), VPN security with IPsec and/or SSL, application layer security such as SRTP, and content protection such as DTCP. Compounding the challenge is the need to support high throughput requirements with mixed packet size traffic characteristics along with low latency requirements to preserve quality of service in voice and video applications in single- and multi-core processor architectures.
Most security protocols require computationally intensive confidentiality and authentication algorithms to be applied to the data. The DesignWare Multipurpose Security Protocol Accelerator provides a framework including a programmable sequencer, secure DMA engine, and cryptographic/hashing resources that can handle a variety of protocols, such as MACsec, IPsec, SSL/TLS/DTLS, SRTP, WiMAX, Wi-Fi, content protection, and 3GPP/LTE/LTE-A. The DesignWare Multipurpose Security Protocol Accelerator reduces the bus traffic and offers increased throughput by supporting efficient data sequencing as well as parallel processing of cryptographic operations (authentication and encryption/decryption).
- Highly configurable security accelerator
- Support for all ciphers, hashes and MAC algorithms used in major protocols such as IPsec, WiMAX, Wi-Fi, 3GPP LTE/LTE-A, SRTP, SSL/TLS/DTLS, MACsec
- Cipher algorithms: AES, DES/3DES, ARC4 [RC4], MULTI2, KASUMI, SNOW 3G, ZUC
- Cipher modes: ECB, CBC, CTR, OFB, CFB, f8, XTS, UEA1, UEA2, 128-EEA1, 128-EEA2, 128-EEA3
- Built-in scatter/gather DMA capability offloads system CPU
- Optimal bus utilization
- Increased throughput through parallel hashing and encryption
- IV import feature – permits DMA of IV with associated payload
- Secure key port to access secrets stored in NVM
- Secure bus option for systems which differentiate between secure and normal processing modes: ARM® TrustZone® support
- Verilog HDL
- Sample synthesis script and constraints
- Sample simulation script