“The Zynqronizer” is a Distributed Shared Memory Management System that offers developers of FPGA-based systems an efficient, flexible and scalable solution for multicore designs. The solution, based on a Network-on-chip (NoC) interconnect structure, saves development time by giving the software designers access to a global memory map for the heterogeneous multicore designs, while providing synchronization of on-chip and off-chip memories. The seamless communication between the two embedded ARM cores and up to 4** Microblaze or other subsystems offers fast, predictable operation. Furthermore, the real-time functionality makes the DME for Zynq an ideal IP-block for many industrial applications.
The Xilinx Zynq SoC is a great device, with plenty of processing power – two ARM Cortex-A9 processors and a range of peripherals. However, there are many applications that benefit from additional Microblaze soft processor cores, not least for increased reliability through single-threading. A Microblaze can also reduce the power consumption by offloading tasks that don’t require the full power of a Cortex-A9. Other common on-chip blocks, e.g. accelerators,Ethernet controllers or proprietary IP-blocks, can also use the distributed shared memory management system.
The Zynqronizer provides an easy and scalable way to implement up to 4 Microblaze cores or other memory demanding IP blocks, using standard industry interfaces. The Zynqronizer (DME P2 M0-RT/F) system provides a synchronization mechanism to guarantee the data synchronization between the cores, while managing all memory as a global address map, to simplify and the software development, reducing risk and development time.
The Zynqronizer supports standard bus interfaces, e.g. AXI4-Lite for Microblaze and AHB-Lite for most other IP-blocks. The DME block provides a background working method to realize a degree of parallelization, which only needs to invoke related APIs. The Zynqronizer is based on Elsip’s DME (Data Management Engine) and a NoC structure, making it easy to scale the design to systems with many cores. The NoC is a packet switched network with deterministic routing and differential services, for best effort and real-time communication. The real-time communication mode guarantees upper delay and lower bandwidth bounds.
- Elsip offers the following deliverables for the Zynqronizer:
- DME IP block as Verilog compiled netlist
- NoC IP as Verilog compiled netlist
- DME software and API
- Test bench, adaptable to customer needs
- Software test cases, adaptable to customer needs
- Elsip and Memcom can also assist in the implementation work.
- Industrial automation
- Video, signal and network processing
- Vision and imaging systems
- Cloud computing
- Scientific computing
- Other high-end embedded applications
Block Diagram of the Distributed Shared Memory Management System