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Generic Waveform Generator

• Scalable approach
• Huge set of supported protocols
• Variable set of driver ans stimuli units possible

Enhanced Multiprotocol Serial Communication Controller

• Rapid prototyping and time-to-market reduction
• Design risk elimination
• Development costs reduction

DCD's Universal Timers System

Enhanced Serial Peripheral Interface – Master/Slave with single, dual, and quad eSPI Bus support for Intel CPU’s

• Rapid prototyping and time-to-market reduction
• Design risk elimination
• Development costs reduction

SMBUS & PMBUS Master/Slave controller

• Master operation: Master transmitter, Master receiver
• Slave operation: Slave transmitter, Slave receiver

Low-power high-speed reconfigurable processor to accelerate AI everywhere.

UART Core with SDLC Function

RSA-ECC High-Performance Multi Public Key Engine

• RSA, ECC and more
• > 1 GHz in 16nm

Network Security Crypto Accelerator

• Scalable architecture & crypto engines for optimal performance/resource usage
• Configurable for perfect application fit
• 100% CPU offload with low latency and high throughput

DDR Encrypter

• Protect the external memory
• On-the-fly encryption
• Optional authentication

I2S/TDM Serial Audio Interface with Asynchronous Sample Rate Conversion

• Integrating this unique component will eliminate a discrete component in the bill of materials
• Support for both FPGA and ASIC with seamless transition

800 Gigabit Ethernet MAC + PCS

• Two 400GBase-R PCS cores with required modifications and glue logic.
• Includes RS-FEC(544,514) KP4 FEC