D&R Headline News | Most Popular | SoC News Alerts | |

IP / SOC Products News

• SiFive Introduces Industry's First Open-Source Chip Platforms (Monday Jul. 11, 2016)
  SiFive, the first fabless semiconductor company to build customized, open-source enabled semiconductors, today announced its flagship Freedom family of system on a chip (SoC) platforms.
  
  
• Palma Ceia SemiDesign Announces Silicon-Proven IEEE 802.11ah HaLow Transceiver for Industry-Standard IoT Applications (Wednesday Jun. 29, 2016)
  Palma Ceia SemiDesign (PCS), a provider of analog and RF IP for next-generation WiFi, IoT and mobile communications, today announced silicon-proven transceiver IP for IEEE 802.11ah HaLow, targeting low-power, long-range Internet-of-Things (IoT) applications
  
  
• Alma Technologies Releases Encoder IP Core for CCSDS-Developed Lossless and Lossy Image Data Compression (Tuesday Jun. 28, 2016)
  Alma Technologies S.A., a company that designs, markets, sells and supports innovative semiconductor IP since 2001, today introduced at the Toulouse Space Show 2016 a new encoder IP core which implements the CCSDS 122.0-B-1 lossless and lossy image data compression standard.
  
  
• PLDA to demonstrate a record PCIe 4.0 system throughput at PCI-SIG DevCon (Tuesday Jun. 28, 2016)
  PLDA, the industry leader in PCI Express® interface IP solutions today announces a demonstration of the industry’s first development platform for PCIe® 4.0. This exclusive demonstration can be viewed in PLDA’s booth at PCI-SIG DevCon, being held in Santa Clara, California on June 28-29, 2016.
  
  
• Silvaco Expands Automotive IP Porfolio with Release of CAN FD Core (Tuesday Jun. 28, 2016)
  Silvaco, Inc., today announced it has expanded its portfolio of production proven IP cores with the addition of FlexCAN, a powerful CAN controller that supports the rapidly emerging CAN FD protocol. FlexCAN is part of Silvaco’s IPextreme portfolio of IP cores developed in conjunction with major semiconductor companies based on the same proven technology used in their own products.
  
  
• CEVA's 2nd Generation Neural Network Software Framework Extends Support for Artificial Intelligence Including Google's TensorFlow (Monday Jun. 27, 2016)
  CEVA today introduced CDNN2 (CEVA Deep Neural Network), its second generation neural network software framework for machine learning.
  
  
• Mobiveil successfully completes RapidIO 3.1 IP (GRIO) interoperability testing with IDT's next generation RXS 50Gbps RapidIO switch (Thursday Jun. 23, 2016)
  Mobiveil today announced that its RapidIO Controller (GRIO) End-Point IP has successfully completed pre-silicon interoperability tests with Integrated Device Technology’s (IDT®) next-generation RapidIO switches.
  
  
• PLDA Announces Gen4SWITCH - The Industry's First PCI Express 4.0 Platform Development Kit (PDK) (Tuesday Jun. 21, 2016)
  PLDA today announced the industry’s first full PCIe 4.0 platform with the launch of the PLDA Gen4SWITCH. PLDA’s Gen4SWITCH is a complete development platform based on PLDA’s PCIe compliant XpressSWITCH IP and PLDA’s XpressRICH4™ controller IP for PCIe 4.0 technology running on a Xilinx® Virtex® UltraScale™ FPGA.
  
  
• Synopsys Optimizes DesignWare IP for PCI Express 4.0 Architecture to Reduce Latency by up to 20 Percent (Tuesday Jun. 21, 2016)
  Synopsys, Inc. (Nasdaq:SNPS), today announced the immediate availability of its optimized DesignWare® PHY and Controller IP Solution for PCI Express® (PCIe®) 4.0 architecture, which reduces latency by up to 20 percent and area by 15 percent compared to the previous implementation.
  
  
• CAN FD Controller IP Core Excels Through Third Plug Fest Testing (Thursday Jun. 16, 2016)
  The CAN FD Controller core developed by Fraunhofer IPMS and available through semiconductor intellectual property provider CAST, Inc. successfully underwent its third Plug Fest testing experience, in Nuremberg, Germany June 2–3, 2016.
  
  
• Alma Technologies Adds Three New Ultra High Throughput H.264 Encoders to its UHT IP Product Line (Thursday Jun. 16, 2016)
  Alma Technologies today announced the addition of three new Ultra High Throughput H.264 encoders to its UHT Image & Video Compression IP product line.
  
  
• Imagination and Intrinsic-ID collaborate on solutions for scalable, flexible and affordable IoT hardware security (Wednesday Jun. 15, 2016)
  Imagination Technologies (IMG.L) and Intrinsic-ID are collaborating to bring even higher levels of security to products that use Imagination’s IP technologies. The first milestone is the availability of Intrinsic-ID’s leading security and authentication technology for Imagination’s MIPS M-class M5150 CPU that targets low-power applications such as M2M, IoT and embedded control. Intrinsic-ID’s Physical Unclonable Function (PUF) technology allows efficient implementation of security functions such as device authentication and anti-cloning on MIPS CPUs.
  
  
• Synopsys' New Suite of DDR4 IP Features Increases Capacity and Reliability of High-Performance Cloud Computing Systems (Wednesday Jun. 08, 2016)
  Synopsys today announced a suite of new features for its 3200 Mbps DesignWare® DDR4 IP to expand memory capacity for high-performance cloud computing systems while improving reliability, accessibility and serviceability (RAS).
  
  
• ARM Announces POP IP for ARM Cortex-A73 on TSMC 16FFC Process (Wednesday Jun. 08, 2016)
  ARM today announced the availability of ARM® Artisan® physical IP, including POP™ IP, for mainstream mobile SoCs based on the new ARM Cortex®-A73 processor on the TSMC 16FFC (FinFET Compact) process. The third-generation Artisan FinFET platform is optimized for TSMC 16FFC process and will enable ARM SoC partners to design the most power-efficient, high performance implementations of Cortex-A73 for mobile and other consumer applications for mass-market price points.
  
  
• Menta Delivers Industry's Highest Performing Embedded Programmable Logic IP for SoCs (Tuesday Jun. 07, 2016)
  Menta SAS, a provider of embedded FPGA (eFPGA) Intellectual Property (IP), today announced the next generation of its embedded programmable logic IP cores for SoCs. The programmable logic, available as both custom and pre-defined IP cores, is based on Menta’s proven eFPGA fabric, optimized to deliver the industry’s best combination of performance, reduced size and low power consumption.
  
  
• PLDA and M31 Announce a Compliant PCI Express 3.0 Solution Including PLDA's XpressRICH3 Controller and M31's PHY IP for the TSMC 28HPC+ Process Node at 8 GT/s (Tuesday Jun. 07, 2016)
  PLDA and M31 today announced that their combined PCI Express® (PCIe®) 3.0 solution passed all PCIe 3.0 compliance tests performed by PCI-SIG® at the compliance workshop in April 2016.
  
  
• Arastu Systems' DFI 3.1 compatible and validated DDR4 Controller Core for increased system performance and reliability (Tuesday Jun. 07, 2016)
  Arastu Systems, a company that specializes in developing IPs in the Memory and Networking area today announced its DDR4 DRAM Memory Controller considering the need for higher performing, higher densities memories in applications pertaining to Data Center and Enterprise market. The IP is compliant to popular industry standards as well customized for specific customer’s needs.
  
  
• Fraunhofer IIS/EAS and SilabTech Announces Best in Class 2.5D Based Chip-to-Chip Interconnect Solution (Monday Jun. 06, 2016)
  Fraunhofer IIS/EAS, and SilabTech announced today their holistic solution for chip-to-chip interconnection. The solution combines the break-through interposer packaging technology from Fraunhofer with SilabTech’s JESD204B high speed serial interface IP core.
  
  
• Arasan Announces DPHY IP Core @2.5Gbps per lane with TSMC 28nm HPC Process (Monday Jun. 06, 2016)
  Arasan Chip Systems, Inc. (“Arasan”), a leading provider of Total IP Solutions for SoC providers, broadens the industry’s largest DPHY IP Portfolio to include the TSMC 28nm HPC Process @2.5gbps per lane.
  
  
• sureCore Delivers 40nmULP Memory Compiler (Friday Jun. 03, 2016)
  sureCore Ltd., the low power SRAM IP leader, today announced the immediate availability of its TSMC 40nmULP process technology memory compiler. The new compiler facilitates utilisation of sureCore's recently announced 40nm Ultra Low Voltage SRAM IP that effectively operates at a record-setting 0.6V across process voltage and temperature.
  
  
• Comcores Announce Availability of a 10G TSN Ethernet MAC solution (Thursday Jun. 02, 2016)
  Denmark Headquartered Comcores ApS, a specialized supplier of silicon intellectual property (SIP) today announced the immediate availability of a 10G Time-Sensitive- Networking (TSN) Ethernet MAC solution targeting FPGA and ASIC devices
  
  
• Synopsys' Next-Generation Embedded Vision Processors Boost Performance up to 100X (Wednesday Jun. 01, 2016)
  Synopsys, Inc. (Nasdaq:SNPS), today announced the DesignWare® EV6x family, its newest generation of processor cores optimized for embedded vision applications requiring high definition resolutions. The fully programmable and configurable EV61, EV62 and EV64 embedded vision processors integrate one, two or four vision CPU cores and a programmable convolution neural network (CNN) engine.
  
  
• sureCore 40nm Ultra-Low Voltage SRAM Proves World Beating Low Voltage Operation in Silicon (Wednesday Jun. 01, 2016)
  sureCore Ltd., the Low Power SRAM IP leader, today revealed that its latest Ultra-Low Voltage SRAM IP effectively operates at a record-setting 0.6V across process, voltage and temperature. The results are silicon-proven on TSMC's 40nm Ultra Low Power CMOS process technology.
  
  
• Andes Technology Corporation Announces Most Advanced Embedded Security Based on Physical Unclonable Functions From Intrinsic-ID Inc. for Its Secure CPU/MCU Cores (Wednesday Jun. 01, 2016)
  Andes Technology announced that it is making available for its secure CPU/MCU cores the Physical Unclonable Functions (PUF) from Intrinsic-ID Inc. of San Jose, California.
  
  
• Toshiba Announces Immediate IP Subsystem Availability of PCI Express and DDR3 for Custom LSI Platforms (Tuesday May. 31, 2016)
  Toshiba Corporation's Storage & Device Solutions Company announced today the immediate availability of PCI Express *1 and DDR3 SDRAM *2 IP subsystems *3 developed in conjunction with Northwest Logic, a leading provider of high-performance, easy-to-use, silicon-proven PCI Express and Memory Interface IP cores.
  
  
• Chips&Media unveils its first Image Signal Processing (ISP) IP solution (Tuesday May. 31, 2016)
  Chips&Media Inc. a leading multimedia SoC IP provider, today announced launch of first Image Signal Processing (ISP) solution, CS series, the move to widening its solution portfolio to cope with continuing demand on image processing and camera related solution.
  
  
• Latest ARM Premium Mobile Technology to Drive Immersive Experiences (Monday May. 30, 2016)
  ARM has announced a suite of premium mobile processor technologies to redefine flagship devices from 2017. The ARM Cortex-A73 processor and the ARM Mali-G71 graphics processor offer sustained performance and efficiency gains that will lead to new products with enhanced contextual and visual capabilities. This will allow devices to run high resolution content for longer periods while staying within strict mobile power budgets.
  
  
• Digital Blocks DB9000 TFT LCD Display Controller IP Core Family Achieves Leadership Across Medical, Industrial, Aerospace, Automotive, Communications, Computer, Monitor, Consumer, IoT, Wearables, and Cinema Applications (Monday May. 30, 2016)
  Digital Blocks, a leading developer of silicon-proven semiconductor Intellectually Property (IP) soft cores for system-on-chip (SoC) ASIC, ASSP, & FPGA developers with display controller, 2D graphics, or video processing requirements, certifies the leadership of the DB9000 TFT LCD Controller IP Core Family across a wide range of applications.
  
  
• PLDA Achieves PCI Express 3.0 Compliance for XpressSWITCH IP, Adding to its List of PCI Express Compliant Products (Thursday May. 26, 2016)
  PLDA today announced another addition to the PCI-SIG® Integrators List, XpressSWITCH™ IP, adding to the company’s suite of tested and certified products. In the past years, PLDA has achieved PCI Express (PCIe®) compliance for eight of its PCIe interconnect IP products, underscoring a commitment to rigorously tested and easy-to-integrate products.
  
  
• Palma Ceia SemiDesign Tapes Out 802.11ax Analog Frontend for Next-Generation Access Points (Monday May. 23, 2016)
  Palma Ceia SemiDesign today announced it taped out an 802.11ax analog frontend (AFE) for next next-generation WiFi access points. The AFE includes analog-to-digital converter (ADC), digital-to-analog converter (DAC) and Baseband PLL (BB-PLL) core IPs designed for manufacture using the TSMC 28HPC process node.