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IP / SOC Products News

• eMemory NeoFuse IP Qualified in 40nm EHV Process (Monday May. 23, 2016)
  eMemory today announces the immediate availability of its OTP technology NeoFuse qualified in the 40nm Embedded High Voltage (EHV) process, and customers have already embedded NeoFuse IP to tape out for mass production.
  
  
• ARM Drives the Future of Premium Mobile Computing with a Multicore Test Chip based on 10FinFET from TSMC (Thursday May. 19, 2016)
  ARM today announced the first multicore, 64-bit ARM®v8-A processor test chip based on TSMC's 10FinFET process technology. Simulation benchmarks show impressive power and efficiency gains relative to TSMC's 16FinFET+ process technology, which is currently used to implement chips powering many of today's leading premium smartphones.
  
  
• M31 Technology Develops a Complete Set of New-Generation High-Performance USB IP solutions (Wednesday May. 18, 2016)
  M31 Technology Corporation, a global silicon intellectual property (IP) boutique, today announced its complete set of new-generation USB PHY, and these PHY are USB 3.1 and USB 3.0 with TYPE-C support; micro USB 2.0 with the smallest area in industry; innovative BCK USB 2.0 and USB 3.0; and BCK USB 1.1 with its low power consumption for the low leakage requirements of IoT applications.
  
  
• Arteris Redefines Heterogeneous Multicore Cache Coherency with Configurable, Distributed Semiconductor Architecture (Tuesday May. 17, 2016)
  Arteris Inc., the innovative supplier of silicon-proven commercial system-on-chip (SoC) interconnect IP, today introduced a semiconductor design technology that enhances the ability of SoC architects to create efficient cache-coherent systems with IP sourced from multiple vendors.
  
  
• Synopsys Expands Portfolio of ARC Processors for Safety-Critical Automotive Applications to Include DSP and Cache Support (Wednesday May. 11, 2016)
  Synopsys, Inc. (Nasdaq:SNPS) today announced the extension of its Safety Enhancement Package (SEP) to Synopsys' DesignWare® ARC® EM processors that include cache support and DSP acceleration.
  
  
• Barco Silex launches flexible eSecure IP module as cornerstone for fully-secured IoT applications (Tuesday May. 10, 2016)
  Barco Silex, the leading provider of IP cores for security, launches a new IP module to turn ASIC and SoC designs into fully-secured IoT (Internet of Things) applications. The eSecure module functions as a root-of-trust, guaranteeing the authenticity and integrity of the application’s hardware, software, data, and communication.
  
  
• Credo 16-nm 28G and 56G PAM-4 SerDes Now Available on TSMC FinFET Compact Process (Monday May. 09, 2016)
  Credo Semiconductor today announced the availability of its 28G and 56G PAM-4 SerDes transceiver IP on TSMC's 16-nm FinFET Compact (16FFC) process, enabling its growing customer base to take advantage of the low-power benefits of this advanced, new process in next-generation designs.
  
  
• EnSilica launches eSi-ECDSA cryptographic IP for standards-compliant automotive Car2x communications (Monday May. 09, 2016)
  EnSilica has launched the eSi-ECDSA cryptographic IP designed to help meet the high security communication and latency requirements of automotive Car2Car and Car2Infrastructure (Car2x) applications that form part of today’s emerging Intelligent Transport Systems.
  
  
• RFEL adds Wideband capability to its award-winning ChannelCore Flex advanced channeliser IP core (Monday May. 09, 2016)
  RFEL has added wideband input capability to its multi-award winning, advanced channeliser IP core, ChannelCore Flex™. This meets the increasing need for ever wider bandwidth monitoring for a wide range of demanding channelisation applications such as communications, intercept, electronic warfare, security, industrial applications, COMINT, SIGINT, sonar, radio astronomy, research and software-defined radio.
  
  
• High Performance HEVC decoder IP released by Chips&Media (Tuesday May. 03, 2016)
  Chips&Media Inc. has announced today the release of the 2nd-generation UHD (4K/8K) HEVC decoder IP called WAVE510. This is the first rollout of the new WAVE5 series based on brand-new architecture.
  
  
• Sonics Develops Industry's First Energy Processing Unit Based on the ICE-Grain Power Architecture (Tuesday May. 03, 2016)
  Sonics today announced that it has developed the IP industry’s first Energy Processing Unit (EPU) based on the company’s ICE-Grain™ (Instant Control of Energy) Power Architecture originally introduced in 2015. Sonics’ ICE-G1™ product is a complete EPU enabling rapid design of system-on-chip (SoC) power architecture and implementation and verification of the resulting power management subsystem.
  
  
• Cadence Announces New Tensilica Vision P6 DSP Targeting Embedded Neural Network Applications (Tuesday May. 03, 2016)
  Cadence today announced the new Cadence® Tensilica® Vision P6 digital signal processor (DSP), Cadence’s highest-performing vision/imaging processor, which extends the Tensilica product portfolio further into the fast-growing vision/deep learning applications areas.
  
  
• BittWare and Atomic Rules announce an FPGA-based UDP Offload Engine IP Core for 10/25/50/100 GbE (Monday May. 02, 2016)
  BittWare, a premier FPGA board supplier for over 25 years, has collaborated with Atomic Rules, a reconfigurable computing IP firm, to announce a UDP Offload Engine (UOE) IP core today at the FCCM 2016 Symposium. A live demo running on BittWare’s XUSP3S PCIe board showcases the UOE IP core operating at 25 GbE with no packet loss.
  
  
• Try and adopt Motu-Uta, the benchmark from Dolphin Integration for a fair evaluation of Standard Cell libraries (Monday May. 02, 2016)
  All designers go with their own method: comparing directly by applying on their own design, merely comparing the nand2, trying to evaluate with key figures… but it is quite uncomfortable to compare products when there is no public benchmark and when the particularity of each library must be mastered for a fair comparison.
  
  
• RFEL launches new Fractional Rate Resampler IP core (Tuesday Apr. 26, 2016)
  RFEL will be launching its latest core at EW Europe. The new Fractional Rate Resampler IP core, which was originally part of the company's multi-award winning ChannelCore Flex™ product, is now offered as a stand-alone IP core for FPGAs in response to customer requests.
  
  
• Synopsys Delivers Industry's First MIPI I3C IP for Sensor Connectivity Targeting IoT and Automotive Applications (Tuesday Apr. 26, 2016)
  Synopsys today announced immediate availability of the industry's first MIPI® I3CSM controller IP to ease the integration of multiple sensors into applications such as mobile, automotive and the Internet of Things (IoT).
  
  
• Low-power of Bluetooth SoCs depends on Dolphin Integration's oscillators (Monday Apr. 25, 2016)
  Dolphin Integration’s oscillator IPs, specifically designed for the Always-On Domain, provide unprecedented optimization capabilities to BLE designers needing to find the best compromise between ultra-low power consumption, low BoM cost, high accuracy of frequency setting and fast power-up.
  
  
• Comcores provide Flexible Ethernet Switch IP Design Optimized for switching in C-RAN and Next-Generation LTE Advanced Networking Equipment (Wednesday Apr. 20, 2016)
  Comcores today announced immediate availability of an ultra-compact Ethernet Switch IP with support for both 1G and 10G ports. The design includes features like 1588 bypass and VLAN functionality and is suited to deliver on your Ethernet switching requirements.
  
  
• Comcores Announce Availability of CPRI v7.0 (Wednesday Apr. 20, 2016)
  Denmark Headquartered Comcores ApS, a specialized supplier of silicon intellectual property (SIP) today announced the immediate availability of the Common Public Radio Interface (CPRI) v7.0 targeting FPGA and ASIC devices.
  
  
• Argon Design launches real-time video stitching IP (Monday Apr. 18, 2016)
  Argon Design Ltd, a design services company specialising in digital video, is launching Argon360, a unique hardware-based real time video stitching technology, at the NAB Show in Las Vegas, 18-21 April 2016.
  
  
• Rambus Cryptography Research Unveils Latest Release of DPA Workstation Analysis Platform (Monday Apr. 18, 2016)
  Rambus today announced the release of the DPA Workstation 8 analysis platform, featuring an extensive upgrade to the workstation software and user interface for enhanced system performance and usability in ASIC and FPGA side-channel vulnerability testing.
  
  
• CAN FD Plug Fest Shows Robust Operation of Controller IP Core by CAST and Fraunhofer IPMS (Friday Apr. 15, 2016)
  The CAN Bus Controller offered by intellectual property provider CAST, Inc. has successfully undergone a second round of real-world-like testing at the CAN Plug Fest run by the CAN in Automation association at Ford’s facility in Detroit.
  
  
• Digital Blocks I2C & SPI Controller IP Core Families Extend Leadership in Sensor Interface to Host Processors with System-Level Features & Low Power (Wednesday Apr. 13, 2016)
  Digital Blocks, a leading developer of silicon-proven semiconductor Intellectually Property (IP) soft cores for system-on-chip (SoC) ASIC, ASSP, & FPGA developers with Embedded Processor & Peripherals requirements, extends its leadership in I2C and SPI Controller Verilog IP Cores targeting IC Sensor interfaces to Host Processors.
  
  
• Brite Semiconductor Releases "YOU" Brand IP Portfolio and Silicon Platform Solution (Wednesday Apr. 13, 2016)
  Based on more than 8 years successful experience of design service and IP development on the cutting-edge processes, Brite provides “YouIP” which means “IP belongs to YOU” portfolio solution and silicon platform to assist customer to win emerging markets like IoT, wearable devices, mobile, consumer electronics and so on, combining with comprehensive ASIC design service solution and trusted manufacturing partner SMIC. YouIP is an IP and platform family attributing to not only Brite, but also our customer-YOU.
  
  
• Barco Silex announces VC-2 HQ RTP mapping ready for broadcast video production over IP (Tuesday Apr. 12, 2016)
  Barco Silex, leading provider of video compression solution in the broadcast market, announces the availability of RTP (Real-time Transport Protocol) mapping for VC-2 encoded video stream. This is an essential building block for the broadcast market moving away from SDI to IP based production flow and will further enable the adoption of the open VC-2 codec standard in this context.
  
  
• Arastu Systems announces DFI 4.0 compatible and validated LPDDR4 DRAM Memory Controller (Thursday Apr. 07, 2016)
  Arastu Systems today announced its LPDDR4 DRAM Memory Controller to cater the increasing demand for high performance and low power memories. The design IP supports popular industry standard AHB/AXI, but gives customers the flexibility to customize the design as per their needs.
  
  
• Arasan Announces Ultra Low Gate count, Ultra Low Latency Soundwire IP Core (Thursday Apr. 07, 2016)
  Arasan Chip Systems today announced the availability of its second generation Soundwire Host IP and Soundwire Device IP Cores. The cores have been designed with an ultra small footprint, with ultra low latency and power consumption to meet the demands of ultraportable devices like Bluetooth headphones, IoT’s and a wide array of mobile devices.
  
  
• eMemory Launches Enhanced NeoFuse IP for IoT Applications (Thursday Apr. 07, 2016)
  eMemory announces today that its enhanced version of NeoFuse IP has been verified in the 55nm ultra-low-power (ULP) process and is currently being delivered to customers to design-in for risk production. The features such as low supply voltage operation, compact IP area, and an internal charge pumping circuit are expected to facilitate flexible circuit design, enhance chip integration, and optimize power efficiency in battery-operated devices and IoT-related applications.
  
  
• Hua Hong Semiconductor Cooperates with MindMotion to Develop IP Platform Targeting IoT Smart Hardware (Tuesday Apr. 05, 2016)
  Hua Hong Semiconductor, a global leading pure-play 200mm foundry, announced today that the company has expanded close cooperation with the domestic leading customization and application solution service provider of Smart Hardware Chips, MindMotion, over the IP platform development targeting IoT smart hardware, to help customers to simplify design procedures and accelerate time-to-market.
  
  
• INNOSILICON Announce the World's First GF14nm DDR4/LPDDR4 PHY &Controller IP Silicon Proven (Monday Mar. 28, 2016)
  INNOSILICON proudly announces the world’s first DDR4/LPDDR4 PHY & Controller IP combination that has been successfully proven in GLOBALFOUNDRIES 14nm LPP process.