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PCIE 5.0 PHY in Samsung 10/8LPP, SMIC 14SFE/SF+, and TSMC 12FFC

• Support 32Gbps serial data transmission rate
• Utilizes 8-bit, 16-bit or 32-bit parallel interface to transmit and receive data

USB-C 3.2/DisplayPort PHY IP for Samsung 4LPE

• Samsung 4LPe
• USB-IF certified DesignWare USB 3.2 solution
• VESA certified DesignWare DisplayPort 1.4 Tx solution

Analog I/O + ESD protection for Die-2-die interfaces

• Analog I/Os
• ESD Power protection
• Ground pads

1-112Gbps Medium Reach (MR) and Very Short Reach (VSR) SerDes

• High speed performance
• Low power architecture
• Sub-sampling clock multiplier

Ultra-low quiescent capacitor-less LDO voltage regulator in Samsung Foundries 65nm LFR6LP

Low-power Power-On-reset design in Samsung Foundries 65nm LFR6LP process

Combined Power-On-Reset and Low-voltage detection in Samsung Foundries 65nm LFR6LP

Low-voltage detector designed in Samsung Foundries 65nm LFR6LP process node

Low-power capacitor-less LDO designed in Samsung Foundries LF6RLP process

Low-power capacitor-less LDO with embedded voltage reference designed in Samsung Foundries LF6RLP process

Ultra-low power 32 kHz XTAL oscillator designed in Samsung Foundries 65nm

Ultra-low power 32 kHz RC oscillator designed in Samsung Foundries 65nm