Search IP on Samsung

High Bandwidth Memory (HBM2) HBM2E PHY - Samsung 11nm

PCIe 4/3/2 SerDes PHY - Samsung 14nm

16G Multi-Protocol SerDes (MPS) PHY - Samsung 14nm

16G Ethernet SerDes PHY - Samsung 14nm

28G LR Multi-Protocol SerDes (MPS) PHY - Samsung 14nm

• Optimized for low-power operation and north/south die-edge placement
• Duplex Lane configurations of x4 and x1

PCIe 5.0 IP on Samsung SF5

• Supports all required features of the PCIe® 5.0, 4.0, 3.1, 2.1, 1.1, and PIPE specifications
• x1, x2, x4, x8, x16 lane configurations with bifurcation

PCIe 4.0 PHY on 8nm

• Low power consumption and small area
• Support 1-, 2- and 4- lane configurations
• Automatic built-in self-test (Loopback)

MIPI D-PHY TRx 28nm

MIPI D-PHY TRx 5nm

• Samsung Foundry 5nm low power enhanced (LN11LPP) CMOS device technology
• 1.8V±5%, 1.2V±5%, 0.8/0.9V±5% power supply

MIPI D-PHY TRx 14nm

MIPI C-PHY TRx / MIPI D-PHY TRx Combo PHY 8nm

• Samsung Foundry 5nm low power enhanced (8LPU) CMOS device technology
• 1.8V±5%, 1.2V±5%, 0.75/0.85V±5% power supply

MIPI D-PHY TRx 8nm