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Embedded OTP (One-Time Programmable) IP, 4Kx32 bits for 0.9V/1.8V FDS

Synopsys USB3.2 PHY IP on Samsung 4LPE

• Supports 20Gbps, 10Gbps, and 5Gbps data rates
• Supports 480 Mbps, 12 Mbps, and 1.5 Mbps data rates

30mA 2-channel LDO voltage regulator (output voltage each channel 1.0V)

• Samsung 28nm FD-SOI
• 1.8V analog input voltage
• 1.0V digital input voltage

3.3V to 1.0V 3.0A Step-down DC-DC converter

• Supply voltage: 3.3V analog and 1.0V digital
• Adjustable output voltage with trimming: 0.8V÷1.15V (1.0V typical)
• Maximum output current up to 3A

LPDDR5x/LPDDR5/LPDDR4 combo PHY on 7nm

• JEDEC compliant LPDDR5x,LPDDR5,LPDDR4x/4
• Operating speed up to 8400Mbps in LPDDR5x, 4266Mbps in LPDDR4X
• Multiple DFICLK : CK :WCK ratios

Maestro Adaptive Workload Manager [PLL] actively adapts to workload changes to boost silicon performance

• Fully SCAN enabled
• Fully customizable to each application
• Wide operating voltages available for DVFS

Maestro Clock Generation Module [PLL], 10x smaller than existing solutions

1-112Gbps Integrated Laser Driver and Optical SerDes

2-16Gbps Multi-Protocol IO Supporting BOW, OHBI and UCIe

• Efficiency
• Composability
• Programmability

MIPI C-PHY Combo PHY & Controller (support combo TTL, LVDS, HiSPI)

Samsung 28nm FDSOI USB3.0 and PCIE2 combo PHY

• USB3.0 Super-Speed: Universal Serial Bus 3.0 Specification, Revision 1.0
• PCI Express: PCI Express Base Specification, Revision 2.0

MIPI D-PHY/C-PHY Combo PHY & Controller (support combo TTL, LVDS, HiSPI)