Synopsys DesignWare® AEON® Non-Volatile Memory (NVM) Multiple-Time Programmable (MTP) Low-Power (LP) and Ultra Low-Power (ULP) IP are optimized for power- and area-sensitive wireless applications and RFID and near-field communication (NFC) tags used in everything from logistics tracking to security and authentication.
Developed in standard 180-nm/3.3V process nodes, the MTP NVM IP offers best-in-class power consumption and enables MTP functionality required by the Gen2 EPC and ISO15693 RFID standards. Delivered as a hard IP block, the DesignWare AEON MTP LP/ULP NVM IP operates from a single 1.8V supply and includes support and control circuitry, including the high voltage generation and distribution required for programming.
Synopsys' new MTP ULP NVM IP offers a 50% area reduction over existing DesignWare MTP NVM IP, reducing system costs by using existing analog blocks already in the system. With single-bit read operation down to 0.9V, the IP reduces power consumption by up to 90% over the previous solution while supporting for up to 100,000 programming cycles, allowing for extensive reuse of RFID and NFC tags
10-year data retention
Single supply operation
Fully integrated HV and control circuitry
Read operation down to 1.0V
Logic based multiple time programmable nonvolatile memory with no extra masks or processing steps
Temperature range from -40 - 85C
Bit count range from 64 bits to 1k bits. Up to 10,000 write-erase cycles
Front-end views (datasheet, Verilog behavioral model, test bench, .lef)