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55nmHV MTP Non Volatile Memory for Standard CMOS Logic Process
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JPEG 2000 RAW Encoder/JPEG 2000 RAW Decoder for HD Image sensors
The IPX-JPHD is a high quality and cost effective family of FPGA based JPEG 2000 encoders and decoders designed to meet the requirements of high data rate processing in broadcast Acquisition, Storage and Contribution.
Based on a single chip, the exceptionally fl exible IPX-JPHD family supports variable compression ratio’s up to Lossless and can be adapted to any image resolution up to HD (1920 x 1080).
The powerful IPX-JPHD modules also provide a compact and reliable solution to broadcasters need for Multi-channel operation through a unique single chip design that enables up to four HD channels to be streamed simultaneously at a total frame rate of 120fps.
Purpose designed for the Xilinx® FPGA the IPX-JPHD family is a no compromise solution that takes full advantage of the benefi ts of the state-of-the-art Virtex-5™ platform including easy connection to HD-SDI, SDI, SDTI, ASI, PCI-Express® and Gigabit Ethernet broadcast and system interfaces.
Based on a single chip, the exceptionally fl exible IPX-JPHD family supports variable compression ratio’s up to Lossless and can be adapted to any image resolution up to HD (1920 x 1080).
The powerful IPX-JPHD modules also provide a compact and reliable solution to broadcasters need for Multi-channel operation through a unique single chip design that enables up to four HD channels to be streamed simultaneously at a total frame rate of 120fps.
Purpose designed for the Xilinx® FPGA the IPX-JPHD family is a no compromise solution that takes full advantage of the benefi ts of the state-of-the-art Virtex-5™ platform including easy connection to HD-SDI, SDI, SDTI, ASI, PCI-Express® and Gigabit Ethernet broadcast and system interfaces.
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