Thalia DA IP Reuse & Technology Analysis
IP Reuse: Understanding and efficiently tackling process technology differences and its impact on circuit functionality
June 2020
Posted on Thursday Jul. 16, 2020
![](https://i1.ytimg.com/vi/JQz8eWCRraI/default.jpg)
2:28
Agile Analog delivers customizable IP on GlobalFoundries' FinFet and FDX processes
Ian Walsh appointed as Sondrel's Regional VP for America
Rising respins and need for re-evaluation of chip design strategies
Simplifying analog and mixed-signal design integration
AI-driven SRAM demand needs integrated repair and security
New Launch: Advanced RISC-V Courses | Maven Silicon
Surveillance Cameras and CV Conditioning
Examining Silent Data Corruption: A Lurking, Persistent Problem in Computing
IP Reuse: Understanding and efficiently tackling process technology differences and its impact on circuit functionality
June 2020
Posted on Thursday Jul. 16, 2020
© 2024 Design And Reuse
All Rights Reserved.
No portion of this site may be copied, retransmitted, reposted, duplicated or otherwise used without the express written permission of Design And Reuse.