Truechip's eMMC verification IP provides effective and efficient way to verify the component interfacing with eMMC interface of an ASIC / FPGA / SOC.
Truechip's eMMC verification IP is fully complied with standard eMMC version JESD84‐B51 from JEDEC. This VIP is a Light Weight VIP with easy plug and play features.
- Compliant to JEDEC eMMC version JESD84 ‐ B51.
- supports eMMC devices from all leading vendors.
- supports configuration for both host and device.
- support all data widths 1x ,4x and 8x. and all speed modes (Low speed / High Speed)
- support both Single and multiple block transfers.
- supports Tuning and general purpose commands
- supports Lock and Unlock features.
- supports Block read and block write.
- supports device density of Greater than equal to 2GB.
- supports both Normal and alternate boot operation.
- supports sleep modes , Reliable Write, Write Protection mechanism.
- Supports Multiple Partitions ( Boot area / user area / general purpose partion)
- support for both SDR and DDR.
- supports Data removal commands Erase / Trim / Santize / Discard , Secure Erase /TRIM
- supports RPMB ,Background operation and HPI
- supports High Speed Mode (HS200 and Hs400)
- supports Enhanced Partition Types and packed commands
- supports Extended Security Commands
- Supports Enhanced Data Strobe and sleep mode
- supports Bus testing and partitioning features
- Support byte and Block Mode Operations
- Reports various timing errors, which can be used to check any timing violation.
- Provides full control to the user to enable / disable various types of messages.
- supports dynamically configurable modes and constrained random testing.
- strong protocol monitor with real time exhaustive programmable check.
- supports Dynamic as well as static error injection scenario
- built in coverage analysis
- provides a comprehensive user API (call backs) in monitor ,host and device controller models /BFM
- Graphical analyser to show transaction for easy debugging.
- Available in native System Verilog (UVM/OVM/VMM) and Verilog
- Unique development methodology to ensure highest levels of quality
- Availability of Compliance & Regression Test Suites
- 24X5 customer support
- Unique and customizable licensing models
- Exhaustive set of assertions and coverage points with connectivity example for all the components
- Consistency of interface, installation, operation and documentation across all our VIPs
- Provide complete solution and easy integration in IP and SoC environment.
- eMMC Host controller BFM / Agent
- eMMC Device Controller / Memory BFM/DUT
- eMMC Monitor
- eMMC Scoreboard
- Test Bench Configurations
- Test suite available in source code
- Basic Protocol test
- Directed and random test
- Assertion and cover point test
- Integration guide / User Manual /release notes
- GUI analyzer to view simulation packet flow
Block Diagram of the eMMC Verification IP Verification IP