Softnautics xSPI Verification IP provides verification of xSPI (Extended SPI) for devices using the Serial Parallel Interface (SPI) protocol for master and slave modes. It is a reusable, configurable, pre-verified, and plug-and-play verification component developed in System Verilog.
The VIP can be used to verify any SPI compliant Master or Slave device. It is equipped for the functional verification of IP cores and SoC designs incorporating SPI as Master and Slave functionality. The VIP can also be used in Monitor mode, where it will only monitor the interface and not drive any signal. This mode is particularly useful in system-level testing.