What to know when designing with high-performance FPGAs
By Joel Tan, Xilinx Inc.(03/09/2006 0:40 PM EST), Programmable Logic DesignLine
Leading-edge programmable logic applications are requiring larger and larger amounts of logic and I/Os, arising from an increasing number of core functions being partitioned into the FPGA. Such high-performance systems typically have a variety of high-bandwidth interfaces and process large amounts of data on the FPGA.
To add to the challenge, these systems will eventually be deployed in demanding environments that call for reliable operation. Margin is designed into performance targets for each interface and logic function to ensure robustness in each and every part of the system.
Packaging enables performance
To be commercially viable, cost considerations and ease of integration dictate that resources be consolidated in a single package to minimize the bill of materials (BOM). Ultimately, the package should appear transparent to the silicon so that electrical performance is not compromised by packaging limitations. High levels of logic and I/O utilization are common in high-performance systems and the package will need to facilitate this with minimal impact.
An FPGA package is not merely a means to an end. Besides acting as interconnect for signals between the die and the PCB, it also serves as part of the power distribution network for the core, auxiliary and I/O power supplies on the die. Adequate bypass capacitance should be provided in the package for each of the voltage rails to provide low inductance power supplies across a wide bandwidth for good power integrity.
An optimal packaging solution should not only provide good simultaneous switching noise tolerance, but also should preserve the integrity of each signal, and deliver more margin by reducing the amount of system noise.
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