Using PCI Express as a fabric for interconnect clustering

Miguel Rodriguez, PLX Technology
EETimes (3/7/2011 9:25 PM EST)

With today’s demanding backplane requirements, the era of Gigabit Ethernet (GbE) as the de-facto interconnect for that platform is coming to a close. As such, a number of interconnect technologies are vying to replace GbE, with the top contenders being 10 Gigabit Ethernet (10GbE), InfiniBand (IB) and PCI Express (PCIe). Though a clear winner has not yet emerged, PCIe, with its advanced capabilities, makes a strong case for becoming the ideal backplane interconnect solution.

Over the last decade, PCIe has evolved from a parallel bus functioning merely as the transport for a single host, to IO devices wherein one host manages a set of IO devices, to a point-to-point high-speed serial interconnect with advanced features capable of taking on challenging backplane demands.

Today, PCIe can easily support an efficient host-to-host communication model as well as other configurations that include IO resource sharing across multiple hosts. Such features lead to a significant reduction in systems’ cost and complexity.

In addition, mainstream processor companies, such as Intel, have been integrating PCIe -- not just in their chipsets, but also as an integral part of the core silicon. With such inherent advantages, PCIe can indeed fill the mantle of being an ideal backplane interconnect.

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