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FPGA / CPLD Articles

• Using yesterday's methodologies to design today's multi-FPGA systems is a recipe for disaster (Jan. 12, 2009)
  The demand to meet multiple, sometimes conflicting, constraints means it's a wonder that FPGA and PCB designers aren't fitted for straightjackets by the time the board finally tapes out. This article explores the tools, techniques, and problems that designers struggle with when developing FPGA-based systems and, using a couple of real-world examples, attempts to offer solutions.
  
  
• Moving motion control technology to FPGAs (Dec. 15, 2008)
  Very early motion control systems used mechanical gearboxes and levers to select speeds and drive power, but these systems were quickly replaced by analog electronic controllers that provided much more flexible speed control and the ability to create systems with more complicated movements.
  
  
• How to exploit the uniqueness of FPGA silicon for security applications (Dec. 11, 2008)
  This article expands the application areas covered by FPGAs by introducing a new class of primitives called "Soft PUFs." By exploiting the silicon uniqueness of each FPGA device and incorporating a special circuit (using existing FPGA fabric) to extract these "silicon biometrics", FPGAs can be used for new security-oriented applications that were not previously possible.
  
  
• Achieve higher accuracy using mixed-signal FPGA calibration (Dec. 08, 2008)
  Mixed-signal FPGAs can be a key element of an effective, efficient, in-circuit analog-signal-channel calibration approach
  
  
• Solving FPGA I/O pin assignment challenges (Nov. 20, 2008)
  Here's a step-by-step methodology to help you pinout complex FPGAs.
  
  
• Programmable logic use in handsets--The basics (Nov. 03, 2008)
  Today a new generation of low-power FPGAs is enabling a new breed of handset designers to create handsets with features bounded only by imagination. Here's why.
  
  
• Replacing obsolete video game circuits with Xilinx CPLDs (Oct. 09, 2008)
  In this article, the author replaces a defective part in a 1980s game system to show his employer that they can replace a range of parts that vendors are no longer producing.
  
  
• How to use FPGAs to develop an intelligent solar tracking system (Sep. 25, 2008)
  This article examines the design advantages of creating an intelligent solar tracking system using an embedded processor and an FPGA in a system-on-a-chip (SOC) architecture.
  
  
• How to defend against the cloning of your FPGA designs (Sep. 18, 2008)
  This article describes a new way of tagging designs to help to counter the rapidly growing trade in stolen IP and cloned designs. The topic is a difficult one for the industry to discuss; recently, however, more and more voices have been raised on the issue.
  
  
• Systolic FIR Filter Based FPGA (Sep. 18, 2008)
  In this paper, we review in detail the basic building blocks of reconfigurable devices, essentially, the field-programmable gate arrays, then we describes a high-speed, reconfigurable Systolic Finite Impulse Response Filter design implemented in the Virtex-II series of FPGAs.
  
  
• Using FPGAs to improve your wireless subsystem's performance (Aug. 25, 2008)
  By offloading operations that require high-speed parallel processing onto FPGAs, overall system performance in such wireless operations as FIR filtering, FFTs, digital down and up conversion and FEC blocks can be improved.
  
  
• Microcontroller Design in FPGAs (Aug. 21, 2008)
  The union of Microcontroller Unit (MCU) intellectual property (IP) cores with FPGAs provides a far more flexible hardware platform than traditional MCU ASSPs.
  
  
• How to analyze and reduce power using Libero IDE (Aug. 14, 2008)
  Meeting low power FPGA design specifications requires automatic power reduction capabilities coupled with sophisticated power analysis features.
  
  
• How to give crime-fighters a flexible, high-performance edge with programmable logic (Jul. 24, 2008)
  This article examines the use of FPGAs and soft-core embedded processors in two crime-fighting applications: a fingerprint identification system and a wireless auto-tracking camera.
  
  
• How to simplify power design development and evaluation for FPGA-based systems (Jul. 10, 2008)
  Validation of power supply voltage at the FPGA; real-time monitoring of Vccint power consumption; realistic power estimates using accurate on-die temperature measurement.
  
  
• How to select CPLDs for handheld applications (Jun. 26, 2008)
  CPLDs offer designers a low-cost system solution with significant advantages compared to traditional implementations using ASICs and ASSPs.
  
  
• Analysis: Altera jumps to 40 nm with Stratix IV (Jun. 09, 2008)
  BDTI analyzes Altera's new Stratix IV FPGAs. The new Stratix IV chip family will include 12 members: six GX devices, and six E devices.
  
  
• Xilinx responds to Altera's FPGA benchmarks (Jun. 02, 2008)
  The folks at Xilinx say that they've re-run the tests with different tool settings and, overall, the Xilinx software solution with Synplify Pro and ISE 10.1 dominates.
  
  
• How to perform meaningful benchmarks on FPGAs from different vendors (May. 29, 2008)
  A suite of unbiased and meaningful benchmarks that truly compare the hardware architectures and software design tool chains from the major FPGA vendors.
  
  
• Tips on using CPLDs to reduce system processor power consumption (May. 27, 2008)
  One of the most critical factors in designing portable electronics today is reducing overall system power consumption. With increased consumer expectations, portable devices require longer battery life and higher performance.
  
  
• How to design portable handsets using CPLDs (May. 22, 2008)
  This tutorial describes the different ways in which CPLDs can be used to address the shortcomings associated with handset platforms.
  
  
• DSP or FPGA? How to choose the right device (May. 08, 2008)
  DSPs and FPGAs both offer advantages for signal processing. Here are the design guidelines you need to choose between DSPs, FPGAs, or a combination of the two. Topics covered include device cost, performance, NRE, and availability of application-specific features.
  
  
• FPGA based Complex System Designs: Methodology and Techniques (Apr. 17, 2008)
  This paper presents FPGA based complex system design limitations along with effective methodology to overcome them. This paper is backed up with vast FPGA based system design experience up-to sixteen million gate count and close to two hundred mega-hertz speed.
  
  
• Preservation of Circuit Structure and Timing during Fault Emulation in FPGA (Apr. 10, 2008)
  This paper presents a technique that allows to preserve structure of a circuit according to a target technology during fault emulation in FPGA. The technique is not restricted to any target technology or FPGA emulation platform
  
  
• How to implement a high-definition video design framework for FPGAs (Apr. 07, 2008)
  This article explores a video design framework that can allow for a faster design cycle; components can be used collectively or you can pick-and-choose as required.
  
  
• HD video line buffering in FPGA (Mar. 31, 2008)
  Complex video processing algorithms need access to various pixel values.
  
  
• Strategies for minimizing Xilinx implementation tool runtimes (Mar. 24, 2008)
  When coupled with the new capabilities provided by the latest release of the Xilinx ISE Design Suite, these strategies can significantly reduce implementation tool runtimes.
  
  
• Multimode sensor processing using Massively Parallel Processor Arrays (MPPAs) (Mar. 20, 2008)
  A multimode sensor processing solution that is upwardly scalable, reconfigurable, and programmable, all while reducing development costs and time to market.
  
  
• Evolving passive optical networks (PONs) demand FPGA design flexibility (Mar. 13, 2008)
  Standards uncertainties abound going forward with PONs; the bedrock for bridging those issues is scalability and flexibility, both of which are provided by FPGAs.
  
  
• Designing FPGA Based Reliable Systems Using Virtex-5 System Monitor (Mar. 10, 2008)
  The fast track development and 24x7 operations have put tremendous pressure on the servers, networking systems and communication equipments. It has become necessary that these systems should operate reliably irrespective of the change in external operating environment like the temperature, humidity, and power fluctuations or, on chip conditions like on-chip temperature, internal voltage levels etc. Measuring the reliability of these physical systems is must for every operational unit.